Rapid Prototyping of Digital Systems

SOPC Edition

Rapid Prototyping of Digital Systems SOPC Edition provides an exciting and challenging laboratory component for undergraduate digital logic and computer design courses using FPGAs and CAD tools for simulation and hardware implementation. The more advanced topics and exercises also make this text useful for upper level courses in digital logic, programmable logic, and embedded systems. This new version of the widely used Rapid Prototyping of Digital Systems, Quartus II Edition, now uses Altera's new 7.1 Quartus II CAD tool and includes laboratory projects for all of Altera's educational FPGA boards (UP1, UP2, UP3, DE1, and DE2). Student laboratory projects provided on the book's DVD include video graphics and text, mouse and keyboard input, and three computer designs. Projects have also been ported to the new DE1 and DE2 boards. New to this edition is coverage of Operating System (OS) support for SOPC design using uClinux including a version of uClinux that runs on the DE1 and DE2 boards.

Rapid Prototyping of Digital Systems SOPC Edition includes four tutorials on the Altera Quartus II and NIOS II tool environment, an overview of programmable logic, and IP cores with several easy-to-use input and output functions. These features were developed to help students get started quickly. Early design examples use schematic capture and IP cores developed for the Altera UP FPGA boards. VHDL is used for more complex designs after a short introduction to VHDL-based synthesis. New to this edition is an overview of System-on-a-Programmable Chip (SOPC) technology and SOPC design examples for the UP3, DE2, and DE1 using Altera's new NIOS II Processor hardware and C software development tools. A full set of Altera's FPGA CAD tools is included on the book's DVD.

    Above: Altera's DE2 board running the uClinux example from the book's DVD. A DE1 uClinux example is also included.

Above: Some other example projects included in the textbook.


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Some DE2 Design Examples (also UP3 and DE1)
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If you have comments or suggestions, email me at hamblen@ece.gatech.edu

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