J.D. Cressler, The Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits, and Applications of SiGe and Si Strained-Layer Epitaxy, CRC Press, New York, NY, 2005, 1210 pages.
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A comprehensive and up-to-date guide to all aspects of silicon heterostructures. An extraordinary combination of material science, manufacturing processes, and innovative thinking spurred the development of SiGe heterojunction devices that offer a wide array of functions, unprecedented levels of performance, and low manufacturing costs. While there are many books on specific aspects of Si heterostructures, The Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits, and Applications of SiGe and Si Strained-Layer Epitaxy is the first book to bring all aspects together in a single source.

Featuring broad, comprehensive, and in-depth discussion, this handbook distills the current state of the field in areas ranging from materials to fabrication, devices, CAD, circuits, and applications. The editor includes "snap-shots" of the industrial state-of-the-art for devices and circuits, presenting a novel perspective for comparing the present status with future directions in the field. With each chapter contributed by expert authors from leading industrial and research institutions worldwide, the book is unequalled not only in breadth of scope, but also in depth of coverage, timeliness of results, and authority of references. It also includes a foreword by Dr. Bernard S. Meyerson, a pioneer in SiGe technology.

Containing 1224 pages, and nearly 1000 figures along with valuable appendices, The Silicon Heterostructure Handbook authoritatively surveys materials, fabrication, device physics, transistor optimization, optoelectronics components, measurement, compact modeling, circuit design, and device simulation.

Features

Audience

Integrated circuit manufacturers, material scientists and engineers, physicists, device engineers, circuit designers, reliability engineers, processing engineers, and semiconductor manufacturers -- anyone involved with the materials, fabrication, device physics, transistor optimization, measurement, compact modeling, circuit design, and device simulation of Si-based heterostructure devices and circuits, and graduate students in all of these areas.


Contents by Chapter:

Preface
Foreword; B. Meyerson

INTRODUCTION; J.D. Cressler
The Big Picture
A Brief History of the Field

SiGe AND Si STRAINED-LAYER EPITAXY

Strained SiGe and Si Epitaxy; B. Tillack
Si/SiGe:C Epitaxy by RTCVD; D. Dutartre
MBE Growth Techniques; M. Oehme
UHV/CVD Growth Techniques; T. Adams
Defects and Diffusion in Strained SiGe and Si; A. Peaker
Stability Constraints in SiGe Epitaxy; A. Fischer
Electronic Properties of Strained Si/SiGe and Si1-yCy Alloys; J. Hoyt
Carbon Doping of SiGe; J. Osten
Contact Metallization on SiGe; C. Maiti
Selective Etching Techniques for SiGe/Si; S. Monfray

FABRICATION OF SiGe HBT BiCMOS TECHNOLOGY

Device Structures and BiCMOS Integration Issues; D. Harame
Fabricating SiGe HBTs on CMOS-Compatible SOI; J. Cai
Passive Components; J.N. Burghartz
Industry Examples at the State-of-the-Art: IBM; A. Joseph
Industry Examples at the State-of-the-Art: Jazz; P. Kempf
Industry Examples at the State-of-the-Art: Hitachi; K. Washio
Industry Examples at the State-of-the-Art: Infineon; T. Meister
Industry Examples at the State-of-the-Art: IHP; D. Knoll
Industry Examples at the State-of-the-Art: ST; A. Chantre
Industry Examples at the State-of-the-Art: TI; B. El-Kareh
Industry Examples at the State-of-the-Art: Philips; R. Colclaser

SiGe HBTS

Device Physics; J.D. Cressler
Second-Order Effects; J.D. Cressler
Low-Frequency Noise; G. Niu
Broadband Noise; D. Greenberg
Microscopic Noise Simulation; G. Niu
Linearity; G. Niu
pnp SiGe HBTs; J.D. Cressler
Temperature Effects; J.D. Cressler
Radiation Effects; J.D. Cressler
Reliability Issues; J.D. Cressler
Self-Heating and Thermal Effects; J-S. Rieh
Device-Level Simulation; G. Niu
Performance Limits; G. Freeman

HETEROSTRUCTURE FETS

Biaxial Strained-Si CMOS; K. Rim
Uniaxial Stressed-Si MOSFETs; S. Thompson
SiGe-channel HFETs; S. Banerjee
Industry Examples at The-State-of-the-Art: Intel 90 nm Logic Technologies; S. Thompson

OTHER HETEROSTRUCTURE DEVICES

Resonant Tunneling Devices; S. Tsujino
IMPATT Diodes; M. Oehme
Engineered Substrates for Electronic and Optoelectronic Applications; E.A. Fitzgerald
Self-Assembling Nanostructures in Ge(Si)/Si Heteroepitaxy; R. Hull

OPTOELECTRONIC COMPONENTS

Si/SiGe LEDs; K. Wang
Near Infrared Detectors; L. Colace
Si-Based Photonic Transistors for Integrated Optoelectronics; W. Ni
Si/SiGe Quantum Cascade Emitters; D. Paul

MEASUREMENT AND MODELING

Best-Practice ac Measurement Techniques; R. Groves
Industrial Application of TCAD for SiGe Development; D. Sheridan
Compact Modeling of SiGe HBTs: HICUM; M. Schröter
Compact Modeling of SiGe HBTs: MEXTRAM; S. Mijalkovic
CAD Tools and Design Kits; S. Strang
Parasitic Modeling and Noise Mitigation Approaches in SiGe RF Designs; R. Singh
Transmission Lines on Si; Y. Tretiakov
Improved De-Embedding Techniques; Q. Liang

CIRCUITS AND APPLICATIONS

SiGe as an Enabler for Wireless Communications Systems; L. Larson
LNA Optimization Strategies; Q. Liang
Linearization Techniques; L. de Vreede
SiGe MMICs; H. Schumacher
SiGe mm-Wave ICs; J-F. Luy
Wireless Building Blocks Using SiGe HBTs; J. Long
Direct Conversion Architectures for SiGe Radios; J. Laskar
RF MEMS Techniques in Si/SiGe; J. Papapolymerou
Wideband Antennas on Si; M. Tentzeris
Packaging Issues for SiGe Circuits; J. Laskar
Industry Examples at The-State-of-the-Art: IBM; D. Friedman
Industry Examples at The-State-of-the-Art: Hitachi; K. Washio
Industry Examples at The-State-of-the-Art: ST; D. Belot

APPENDICES
Properties of Si and Ge; J.D. Cressler
The Generalized Moll-Ross Relations; J.D. Cressler
Generalized Integral Charge Control Relations; M. Schröter
Sample SiGe HBT Compact Model Parameters; R. Malladi

INDEX