Lectures
Main 2030 Page
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Date
Topic
Material/Reading
1
M 8/22
introduction
2
W 8/24
Switch Networks
CMOS circuits
3
F 8/26
Switch Networks
4
M 8/29
Switch Networks
5
W 8/31
Boolean Algebra
6
F 9/2
Boolean Algebra
M 9/5
Labor Day Holiday
7
W 9/7
Simplification
8
F 9/9
Simplification
9
M 9/12
Simplification
10
W 9/14
Gate Design
11
F 9/16
Gate Design-mixed logic
mixed logic
12
M 9/19
Arithmetic
Sections 1.2--1.3, 5.2--5.4, 11.7
13
W 9/21
Arithmetic
14
F 9/23
Exam Review #1
15
M 9/26
Midterm Exam #1
16
W 9/27
Building Blocks
Sections 3.1, 4.3--4.6
17
F 9/30
Building Blocks
18
M 10/3
Building Blocks
19
W 10/5
Latches and Registers
Sections 6.1--6.3, 7.1
20
F 10/7
Latches and Registers
21
M 10/10
Latches and Registers
22
W 10/12
State Machines
Section 6.4
23
F 10/14
State Machines
State Machines Handout
M 10/17
Semester Break
24
W 10/19
State Machines
25
F 10/21
Counters
Sections 7.6--7.9
26
M 10/24
Counters
27
W 10/26
Memory
Memory Handout
28
F 10/28
Memory
Chapter 9
29
M 10/31
Memory
30
W 11/2
Datapath Elements
Sections 7.3--7.5, 10.1--10.4
31
F 11/4
Datapath Elements
Datapath Elements
32
M 11/7
Exam Review #2
33
W 11/9
no class - exam review time
34
F 11/11
Midterm Exam #2
35
M 11/14
Single Cycle Datapath
Single Cycle Datapath
36
W 11/16
Single Cycle Datapath
37
F 11/18
Single Cycle Datapath
38
M 11/21
Instruction Types
Instruction Set Architecture
39
W 11/23
Instruction Types
F 11/25
Thanksgiving Holiday
40
M 11/28
Branching
Branching
41
W 11/30
Branching
42
F 12/2
Procedure Calls
43
M 12/5
Procedure Calls
44
W 12/7
Review
45
F 12/9
Review
Final
W 12/14
8:00-10:50am
Section A
Final
T 12/13
8:00-10:50am
section B
Copyright © 2005 Georgia Tech ECE 2030 Sections A&B
Last modified: 11/07/05