Sudhakar Yalamanchili
Joseph M. Pettit Professor

The School of Electrical and Computer Engineering
yalamanchiliGeorgia Institute of Technology
Mailing Address:

266 Ferst Drive, KACB 2316

Atlanta, GA 30332-0765

Phone: (404) 894-2940
Fax: (404) 894 9959
Office: KACB 2316


Weekly Schedule: Current Schedule

Semester Schedule: Fixed Meetings

Office Hours Spring 2015: See Fixed Schedule

Fall 2015 Teaching:

ECE 3056: Architecture, Concurrency and Energy in Computations

ECE 8823: GPU Architectures

Research: Computer Architecture and Systems Laboratory                    



Sudhakar Yalamanchili received the B.E degree in Electronics from Bangalore University, India and the MS. and Ph.D degrees in Electrical and Computer Engineering from the University of Texas at Austin in 1980 and 1984 respectively.

He is currently a Joseph M. Pettit Professor of Computer Engineering in the School of Electrical and Computer Engineering at the Georgia Institute of Technology in Atlanta GA. Prior to joining Georgia Tech in 1989 he was Senior and then Principal Research Scientist at the Honeywell Systems and Research Center in Minneapolis. At Honeywell he was the Principal Investigator for projects in the design and analysis of multiprocessor architectures for embedded applications. During that time he served as a member of Honeywell’s Program Technical Advisory Board to MCC and was an Adjunct Faculty and taught in the Department of Electrical Engineering at the University of Minnesota. He currently serves as a Co-Director Center for Experimental Research in Computer Systems (CERCS) (

Dr. Yalamanchili contributes professionally with regular service on editorial boards and conference & workshop program committees. Current and recent service includes the Editorial Board of Computer Architecture Letters (2011- 2015), Program Co-Chair  IEEE/ACM International Symposium on Networks on Chip (2014), and  IEEE International Symposium on Workload Characterization (2015), and Program Committees for the IEEE/ACM International Symposium on Microarchitecture (2015), IEEE International Symposium on High Performance Computer Architecture (2014), and IEEE/ACM International Symposium on Computer Architecture (2014). He is a member of the ACM and an IEEE Fellow.



My current research interests are organized along three major themes. The first is scalable modeling and simulation technologies for many core architectures and systems. A collaborative project with several faculty, the Manifold project, seeks to develop an open source infrastructure for workload-driven parallel simulation of many core architectures. The project provides software support for integrating existing point tools and models, through  i) simulation kernels to support via standardized APIs necessary event, synchronization and time management services, and ii) interface specifications between core, cache, network, memory and emulator components to mix and match models.  We have also developed KitFox - multiphysics libarary of public domain tools for integrated energy/power, reliability, cooling, and thermal modeling. KitFox is designed for ease of integration with cycle-level multicore simulators.  The second area of focus is on heterogeneous architectures and systems. Our research is coalesced around several system efforts.  The current focus is understanding, and developing compiler and microarchitecture optimizations in support of dynamic parallelism in bulk synchronous applications. We are also working with LogicBlox Inc. developing Red Fox - a compilation environment from Datalog to large-scale multi-GPU clusters including out of core data sets.  Finally, we are working on a C++  based tool chain for the generation of synthesizable GPU and RISC microarchitectures. Working with other faculty, the first generation heterogeneous processors are being targeted for integration into 3D memory systems with OpenCL support. Past projects include Oncilla (global address support for GPU clusters), Ocelot (dynamic multiplatorm compilation for CUDA), and Lynx (dynamic code manipulation for BSP language programs). for supporting large data sets encountered in data warehousing applications.The third theme investigates tighter physical dependencies between the physics (e.g., thermal fields and device wear-out) and the operation of the microarchitectural components in terms of delay, reliability, and energy with the goal of creating robust microarchitectures that are adaptive to be operational across a wide physical dynamic range. This effort utilizes the KitFox (previously called Energy Introspector) library integrated with Manifold models for 2D, 2.5D, and 3D full system architecture modeling.

 We gratefully acknowledge the generous support of our current and recent research efforts by the National Science Foundation, Sandia National Laboratories, SRC, LogicBlox Corporation, Samsung Corporation, HP Labs,  AMD,  Intel Corporation, IBM Corporation, Qualcomm, and NVIDIA Corporation.



In the recent past I have taught or am teaching the following classes.

ECE 3056: Architecture, Concurrency and Energy in Computations (Fall 2015)

ECE 8823: GPU Architectures (Fall 2015)

ECE 4100/6100: Advanced Computer Architecture

ECE 8813a: Design and Analysis of Multiprocessor Interconnection Networks

In the past I have devoted time to the development of the following textbooks.

Interconnection Networks, J. Duato, S. Yalamanchili, L. Ni, Morgan Kaufman, 2003.
VHDL Starters Guide, 2nd Edition, Prentice Hall, 2004.
VHDL: From Simulation to Synthesis, Prentice Hall, 2000 (reprinted in Japanese, 2002)




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