The process of IC manufacturing often requires hundreds of sequential
steps, each one of which could lead to yield loss. Consequently, maintaining
product quality in an IC manufacturing facility often requires the strict
control of hundreds or even thousands of process variables. The issues of high
yield, high quality and low cycle time are being addressed in part by the
ongoing development of several critical capabilities:
The most important step in semiconductor process modeling is the collection of data. It is essential to gather a sufficient sample of representative data; or else it is impossible to train a neural network or any other type of model. As an example of a methodology for collecting real-time data for semiconductor process modeling or process control, consider the project In-Situ Monitoring of Reactive Ion Etching. This project describes an effort to design a real-time data acquisition system for RIE as well as the development and implementation of a prototype microsensor for monitoring of film characteristics during etching. This sensor will facilitate in-situ characterization of etch rate on the wafer surface, a significant contribution to the state of the art. The microsensor concept has evolved further in the project A Smart Sensor for Monitoring Reactive Ion Etching. Another project in the area of process monitoring is A Piezoelectric Silicon Acoustic Sensor, in which the goal is to investigate the use of acoustic signals for monitoring of plasma processes.
Several researchers have of late reported noteworthy successes in using neural nets to model the behavior of several key fabrication processes. Here the ability of neural nets to discover input/output relationships from limited data is very useful. At the Georgia Tech Microelectronics Research Center (MiRC), back-propagation (BP) neural networks have been used to model ion-assisted plasma etching, as well as a variety of other processes widely used in semiconductor manufacturing.
The models are required by semiconductor manufacturers in order to predict process behavior under an exhaustive set of operating conditions, and with a very high degree of precision. However, plasma processing involves highly complex and dynamic interactions between reactive particles in an electric field. Due to this inherent complexity, approaches to plasma etch modeling which preceded the advent of neural networks had met with limited success.
Other processes besides plasma etching have benefited from the neural
network approach. To name one, chemical vapor deposition processes are also
nonlinear and also have been modeled by these means to good effect.
Researchers at the MiRC have developed neural process models for
plasma-enhanced chemical vapor deposition of silicon
dioxide films. Process models have also been developed for
metal-organic chemical vapor deposition(MOCVD) and
molecular beam epitaxy (MBE), two popular techniques for
growing thin, high purity epitaxial films.
A natural extension of the neural modeling of processes is using the models
thus obtained to optimize processes or generate recipes for them. This
optimization is designed to produce designated target output responses based on
the functional relationship between controllable input parameters and process
responses supplied by the neural models. Such a process optimization
activities has been undertaken in the projects Plasma
Enhanced Chemical Vapor Deposition and Recipe Synthesis for PECVD and
Process Modeling and Recipe Synthesis of Integrated
Since they can be used to build predictive models from multivariate sensor data generated by process monitors, neural nets have also been applied to the control of semiconductor manufacturing processes. The Intelligent Semiconductor Manufacturing Group is participating in process control efforts through the projects Real Time Control and Endpoint Detection of Reactive Ion Etching, Real-Time Control of Plasma Etching Using Integrated Sensors and Adaptive Neural Networks, Modeling and Control of Variable Frequency Microwave Processing, and Modeling and Control of Molecular Beam Epitaxy using the RHEED Diffraction Pattern.
The use of Neural networks for the diagnosis of semiconductor manufacturing processes and equipment is relatively new. Toward this end, the Intelligent Semiconductor Manufacturing group has adopted the strategy of using neural networks in tandem with expert systems in the projects Automated Malfunction Diagnosis Of A Reactive Ion Etcher, Real-Time Diagnosis of Reactive Ion Etch Using Optical Emission Spectroscopy, and Modeling and Diagnosis of Excimer Laser Ablation
Parametric Yield Modeling
Historically, IC yield enhancement has focused on the reduction of manufacturing anomalies such as particulate matter, mechanical damage, and crystalline defects. Under this paradigm, circuit failure is primarily characterized internal opens or shorts, so-called "catastrophic" defects which result in a loss of functionality.
However, degradation in IC performance can result from sources other than catastrophic defects alone. In fact, even in a defect-free fabrication environment, random variations in the manufacturing process itself will lead to products with varying levels of performance. These manufacturing variations result from the fluctuation of various physical parameters (i.e. - doping concentrations, oxide thicknesses, line widths, etc.), which in turn manifest themselves first as variations in IC device parameters (such as threshold voltages), and finally as variations in circuit performance measures (such as bandwidth). Accurate IC performance prediction requires precise characterization of these variations. Tools are therefore necessary which are capable of modeling circuit parametric performance based on device and manufacturing variation, rather than simply relying on nominal parameter values.
Neural networks and various statistical methods are used as parametric yield
modeling tools in the projects Statistical Prediction of
Integrated Circuit Performance, Reliability
Modeling and Parametric Yield Prediction of GaAs MQW Avalanche Photodiodes,
and Design and Optimization of Microwave Circuits and
Systems Using Artificial Intelligence.
In-Situ Monitoring Of Reactive Ion Etching
In this research project we have developed a system capable of real-time acquisition and analysis of tool data regarding ambient process conditions in a reactive ion etcher. These conditions include chamber temperature and pressure, forward and reflected RF power, DC bias, and gas flow rates. This data will be used for real-time process control and automated equipment malfunction diagnosis. Toward this end, a Tektronix Model 2510 Testlab data acquisition system has been successfully interfaced to the Plasma Therm Model 720/740 RIE located in the Georgia Tech Microelectronics Research Center. This system has been used to transfer data from the RIE (which is located inside the cleanroom) to a remote workstation for analysis.
In addition to this data acquisition system, a parallel goal for this project
is the development and implementation of a prototype microsensor for in-situ
monitoring of RIE film characteristics during etching. The sensor is
fabricated using multilayer molded, micromachined platforms and will facilitate
in-situ characterization of etch rate at various locations on the wafer
surface. This sensor provides a direct, non-intrusive means of etch rate
monitoring, a significant contribution to the state-of-the-art.
The microsensor consists of a micromachined platform suspended over a drive electrode on the surface of the wafer (see above figure). The platform is electrically excited into resonance during the RIE process. As material is etched from the wafer (and therefore the platform), the resonant frequency of the platform changes. This change in frequency, which is proportional to the amount of material remaining on the beam, will monitored in real time and used to determine etch rate. Conceptually, this technique is similar to the quartz microbalance for deposition process.
As a proof-of-concept experiment, a platform made of DuPont 2611 polyimide has been fabricated. The sensor is driven into resonance electrostatically, and the shift in resonance is detected by monitoring the change in impedance between the drive electrode and platform as the drive frequency is swept. To enhance filtering of the sensor signal in the noisy plasma environment, the platform was designed so that the ratio of the plasma frequency to the fundamental mode of vibration is approximately 400:1. The prototype was etched in a Plasma Therm 700 series RIE system in a CHF3/O2 plasma. Electrical contact was made with the sensor using a feed-through attached to the vacuum line beneath the process chamber to facilitate in-situ excitation and measurement. Ultimately, this monitoring technique has the potential of providing in-situ process monitoring of both etch rate and uniformity at a nominal cost. This technique has the potential to be quite robust, accurate, and cost effective.
The solid-state computing, telecommunications, aerospace, automotive and consumer electronics industries all rely heavily on integrated circuits (ICs). Next-generation IC manufacturing equipment will require dramatic improvements in cost, quality, throughput, and flexibility. Reducing manufacturing cost involves increasing chip yield, reducing cycle time, maintaining consistent product quality, improving equipment reliability, and maintaining stringent process control. Since IC fabrication consists of hundreds of steps, maintaining product quality requires the control of thousands of variables. Process steps are performed in sequence, and yield loss may occur at every step. However, an effective process control system can alleviate these problems. For example, one prominent U.S. IC manufacturer estimates that approximately $35,000 worth of scrap is produced per hour in reactive ion etching (RIE) due to the lack of adequate real-time control capabilities.
In this program, we will develop neural network-based algorithms for model-based feedback control of RIE. We further propose to implement these algorithms in hardware and integrate them with "smart" sensors designed to monitor this process in real time. Our approach will advance the current state-of-the-art due to: 1) non-invasive sensing capability based on microsensor technology; 2) accurate process models built using neural networks, which are significantly more accurate than traditional methods; and 3) real-time neural network based control algorithms implemented in hardware. As an application vehicle, process control will be demonstrated in the Plasma Therm SLR series RIE system located in the Georgia Tech Microelectronics Research Center. The successful development and implementation of these methods will lead to an intelligent "system-on-a-chip" which facilitates improved on-line data collection for real-time RIE process control, thereby minimizing run-to-run variability, enhancing process capability, and enhancing overall manufacturability.
An embedded real-time process control system such as this can result in dramatic improvements in overall equipment effectiveness, reduction in downtime, and reduction of scrap in semiconductor manufacturing equipment. A new RIE tool currently costs between $1M and $2M. Therefore, each percent of productivity improvement in an etch system is easily worth $10,000 - $20,000. The successful development and implementation of this system can therefore lead to significant productivity enhancements and will be of great value to the semiconductor manufacturing industry.
Since semiconductor fabrication processes require numerous steps, cost and yield are critical concerns. In-situ monitoring is therefore vital for process control. However, this goal is currently restricted by the shortage of available sensors capable of performing in this manner. The goal of this project is to investigate the use of acoustic signals for monitoring of plasma processes. Currently, most methods for plasma process monitoring rely on optical emission or interferometric techniques. Essentially, these techniques are based on "looking" at a plasma to monitor its status (and thus, the status of the wafers undergoing plasma processing). What is being investigated here involves "listening" to a plasma either in addition to or instead of merely "looking." It is anticipated that using acoustic methods for plasma monitoring will enhance the amount and sensitivity of data collection to facilitate plasma process diagnostics and control.
As a demonstration project, a silicon acoustic sensor that will perform as a
miniature microphone is currently under development (see Figure). The eventual
goal for this sensor is to enable in-situ monitoring of plasma and electroless
plating processes and for leak detection in vacuum chambers. Silicon acoustic
sensors are quite favorable because of their utilization of integrated circuit
and micromachining techniques, enabling miniature devices with precise
dimensions, batch fabrication of sensors, and good reproducibility.
The sensing element of the silicon microphone will be a deflectable thin diaphragm composed of a piezoelectric material, zinc oxide (ZnO). The transduction operation is based on the piezoelectric effect, in which an acoustical pressure applied to a polarized ZnO crystal results in a mechanical deformation, creating an electrical charge. In other words, movement of the diaphragm due to sound pressure produces stress in the ZnO and thus, produces a dielectric displacement current perpendicular to the plane of the diaphragm. Electrodes, placed in the region of greatest bending stress, are used to collect the surface charges of the ZnO and a charge amplifier is used to measure the charge. These measurements can be evaluated and used to analyze process parameter changes, thus providing an additional source of data for in-situ monitoring and control.
In integrated circuit fabrication, silicon dioxide films deposited by plasma enhanced chemical vapor deposition (PECVD) are useful as interlayer dielectric for metal-insulator structures such as multichip modules. The PECVD of SiO2 in a SiH4/N2O gas mixture fields films with excellent physical properties. However, due to the complex particle dynamics within a plasma, it is difficult to determine the exact causal nature of the relationship between film properties and controllable deposition conditions. The overall goal of this research is to develop and implement a tool for modeling the PECVD process and recipe synthesis using neural networks and genetic algorithms (guided stochastic search procedures based on natural selection concepts which are used to globally explore multidimensional response surfaces).
The procedure calls for the deposition of SiO2 to be characterized via a
fractional factorial experiment. Data from this experiment is then used to
train feed-forward neural networks using the error back-propagation algorithm.
An example of a PECVD process model constructed using this method appears
in the figure below. The trained neural networks are then used for recipe
synthesis to generate the proper deposition conditions to obtain specific film
properties. The response surfaces of the neural process models were explored
using genetic algorithms, the simplex algorithm, Powell's method, and hybrid
methods (i.e- genetic & simplex algorithms, or genetic algorithm & Powell's
method). The performance of each of these synthesis methods was compared using
various criteria, with the genetic optimization approach exhibiting superior
qualities. Deposition was carried out in the Plasma Therm 700 series PECVD
system located in the Georgia Tech Microelectronics Research Center.
This research outlines a strategy for the optimization of the fabrication of integrated decoupling capacitors for use in MCM-L/D compatible substrates. The use of integrated passive components (i.e., resistors, inductors, and capacitors) in large area MCM substrates offers advantages in silicon packaging efficiency, miniaturization, performance, and simplified processing.
Decoupling capacitors act as a charge reservoir and are essential to suppressing switching noise in MCMs. Most MCMs today rely primarily on surface mounted hybrid components for decoupling purpose. However, these surface mounted devices are relatively large (therefore occupying significant space on the substrate) and have large parasitics (reducing their efficiency in decoupling). Integrating decoupling capacitors into the PWB substrate directly beneath the chips is a strategic solution to overcoming these technology challenges. Using this approach, composite structures consisting polymer materials filled with ceramic particles have been used to realize integrated decoupling capacitors.
This project focuses on statistically designed experiments for systematic
characterization of the dielectric constant and loss tangent of integrated
capacitors. We determine dielectric constant and loss tangent as a function of
the type of polymer material, the volume fraction of ceramic in the polymer
matrix, and the polymer cure time and temperature. These factors have been
examined by means of a D-optimal experiment. Results indicate manipulation of
each of the four factors over the ranges examined proved statistically
significant and led to considerable variations in dielectric constant and loss
tangent. Based on data from these experiments, we train neural networks to
model the process variation as a function of above variables (see figure).
Using this methodology, we will determine proper combinations of
polymer/ceramic materials and processing conditions to achieve desirable
Metal-organic chemical vapor deposition (MOCVD) has become a very popular technique for growing thin, high purity epitaxial films with applications in electronics and optics. MOCVD growth is a complex process involving convective and diffusive transport of the reacting species, together with chemical kinetics in the vapor phase and on the solid surface. Numerical modeling of MOCVD reactors represents a unified theoretical approach to developing insight into the underlying process chemistry and physics.
Process models relate performance variables (such as deposition rate, uniformity, film composition, etc.) to ambient operating conditions (such as reactor geometry, reactant species concentration, flow rates, temperature gradients, etc.). These models are useful for predicting the performance of existing reactors, and can also provide optimal designs for new reactors for a given process. Furthermore, mathematical MOCVD models may be used in the identification and interpretation of diagnostic experiments and may lead to a better understanding of experimental observations.
The goal of this research project was to develop numerical and semi-empirical
models for MOCVD growth, with the growth of titanium dioxide films serving as
an application vehicle. This work utilized 2- and 3-dimensional numerical
simulation and computer visualization techniques to gain a more complete
understanding of the fundamental relationships underlying the epitaxial growth
process. For this research, an invertical MOCVD reactor was selected. The
numerical model begins by solving differential equations originating from the
transport equations (conservation of mass, momentum, energy, and chemical
species) using finite difference methods. As an example of the results of our
numerical MOCVD modeling, the figure below shows (a) the flow pattern and (b)
temperature contours for an inverted vertical reactor with a conical inlet
To augment the numerical modeling, semi-empirical models which utilized hybrid neural networks were developed as a means to estimate unknown physical parameters such as reaction rate constants and activation energies. Back-propagation neural networks have previously been used as "black-box" models of dynamic systems. More recently, hybrid neural nets have used as process variable estimators in modeling bioreactors. In this project, we have similarly integrated available physical models with neural networks to provide more robust models of process behavior under a variety of deposition conditions.
The electronic properties of many compound semiconductor devices are highly dependent on heterointerface structure and composition. In recent years, mixed anion materials have become the focus of interest for designing next-generation devices, such as long-wavelength lasers and high-frequency HEMTs and HBTs. While these materials offer significant advantages in the form of band gap engineering, a better understanding of the processes occurring during the growth of the interfaces will allow for improvements in device performance and manufacturing.
Molecular beam epitaxy (MBE) is a versatile thin film growth technique used in the development of advanced III-V semiconductor devices. The focus of this work is to develop semi-empirical models of the microscopic processes occurring at the interfaces of MBE grown devices. The development of structures which exhibit the dominant MBE processes is crucial to the analysis of growth kinetics. These structures will be analyzed via high resolution x-ray diffraction (HRXRD) and simulation, reflection high-energy electron diffraction (RHEED) analysis, reciprocal-space mapping (RSM) and other techniques which will allow the determination of both chemical composition and strain profiles. A kinetic model will be used in conjunction with back-propagation neural networks to develop a hybrid neural network model that describes the effects of MBE growth processes at the interfaces of mixed anion III-V heterostructures.
A novel approach for characterizing RHEED signals used in the real-time
monitoring of MBE has been developed. The proposed modeling technique uses
principal component analysis (PCA) to reduce the dimensionality of the RHEED
data set, and the reduced data set is used to train neural nets to model the
process responses. The neural process models exhibit very good agreement with
The characterization of the anion exchange process has been performed for both As-for-Sb exchange and Sb-for-As exchange. Several experiments have provided initial insight into the anion exchange process. These experiments consisted of 20-period GaAs(y)Sb(1-y)/GaSb and GaSb(y)As(1-y)/GaAs superlattices (SLs) grown by MBE. High-resolution x-ray diffraction was used to characterize and compare the exchange process at the interfaces of mixed anion heterostructures. Interface composition profiles have been obtained from full dynamical x-ray simulations performed on the structures that exhibited anion exchange. Structural and com positional information obtained from spectroscopic ellipsometry (SE) and x-ray photoelectron spectroscopy (XPS) will be used in conjunction with the x-ray simulation data to resolve the interface profiles. Conditions such as substrate temperature and anion exposure time were varied to impact the degree of exchange.
Interfaces play a critical role in the performance of heterostructure
electronic and photonic devices. Heterostructure devices are affected by anion
exchange, a process where atoms exchange lattice sites across the
heterointerface, and this results in degraded device performance. The process
conditions (temperature, atomic species, sub-layer composition, etc.) during
formation of the interface potentially dominate the driving forces behind
This project involves the examination of growth processes during formation of the interface in heterostructure devices in order to improve device performance, reliability, and manufacturability. Experiments will be performed using solid-source molecular beam epitaxy, a semiconductor growth technique that controls thickness, doping, and composition. Anion exchange will be examined using InAs/AlSb-based high electron mobility transistor (HEMT) devices as the test vehicle. Designed experiments will be utilized to gather data that characterizes the growth of As/Sb HEMT structures. Through the use of in-situ monitoring techniques, device analysis, and neural network modeling, process models will be developed. On the basis of device performance parameters and interfacial quality, growth regimes and novel fabrication methods will identified.
Consistent demands on semiconductor manufacturers to produce circuits with increased density and complexity have made stringent process control an issue of growing importance in the industry. While statistical techniques provide effective control solutions for less critical applications, neural networks offer great promise in modeling complex fabrication processes such as reactive ion etching (RIE). The processing of modern materials often requires precise in-situ equipment control. For this reason, neural network techniques will be explored to provide real-time, model-based feedback control of RIE.
Recent research has shown that an indirect adaptive control scheme may provide
an effective implementation of the neural network model. Further research will
examine the efficacy of the approach as it is applied to stop etch time
prediction. One application of this control methodology involves the etching
of optoelectronic heterostructures fabricated by the epitaxial liftoff
technique. In this case the heterostructure devices, which include material
systems such as AlGaAs/GaAs, must be precisely etched following their removal
from the growth substrate. In so doing, etching must stop on specific
heterostructure layers which are very similar in composition (see figure).
Such similarity makes traditional spectroscopic methods of endpoint detection
difficult to implement. Since accurate control of the etch endpoint is
essential, we will investigate indirect model predictive control methods which
employ neural networks to achieve the desired precision.
Endpoint detection for a GaAs/AlGaAs inverted metal-semiconductor-metal photodetector heterostructure will be examined using a Plasma Therm SLR 700 series reactive ion etcher in order to develop an accurate control system. Residual gas analysis, optical emission spectroscopy, and laser interferometry techniques will be used to provide useful feedback signals for determining the stop etch time. Coupling these signals with previously developed neural network modeling and control techniques promises to provide an accurate endpoint detection scheme.
The goal of this project is to develop neural network-based algorithms for model-based feedback control of RIE. We further propose to implement these algorithms in hardware and integrate them with "smart" sensors designed to monitor this process in real time. An example of such a sensor is the prototype micromachined platform designed to assess RIE etch rate. The platform is coated with the same material to be etched and as etching proceeds, the sensor is excited into resonance by the drive electrode. The sensor provides direct real-time feedback on the wafer state during the etch by correlating film thickness with resonant frequency.
One problem with the above approach is the inability to sense the small current
signals that are used to locate the resonant condition. A means to circumvent
this problem is to place the micromachined platform at the input of an
amplifier. This is the approach that we intend to pursue by replacing a
capacitor in an autozeroing floating-gate amplifier (AFGA) designed with the
micromachine structure. Use of the AFGA will facilitate high sensitivity to
the changes in capacitance during etching.
Using the micromachined sensor and AFGA circuit as a RIE process monitor, we then propose to use back-propagation neural networks as a vehicle with which to develop a real-time RIE process control system. We will use a model-based indirect adaptive control (IAC) strategy. The control scheme will utilize two neural networks operating in unison: one trained to emulate the process and another trained to learn the inverse dynamics of the process and perform the control operation.
The neural network process control algorithm proposed must perform fast enough to control real-time changes in process conditions. We propose to use fast parallel hardware to perform the challenging computational task in real-time.
Conventional thermal processing steps can take several hours to perform, slowing throughput and contributing a significant portion of the cost of manufacturing IC packages. With the demand for lighter, faster, and smaller microelectronic devices, there is a need for innovative material processing techniques and control methodologies for these new techniques. One such technique is variable frequency microwave (VFM) processing, which can perform some of the same functions as conventional thermal processing in minutes. However, there are several limitations in VFM processing, including: lack of reliable temperature measurement techniques, uncertain process characterization methods, incomplete understanding of the interactions between microwaves and materials, and a lack of control over the various processes occurring. Therefore, the research goals of this project are (1) process monitoring; (2) modeling and optimization; and (3) process control.
An acoustic sensor is being investigated as a potential solution to address
the lack of accurate temperature measurement techniques. This sensor measures
the time-of-flight of an acoustic wave in the semiconductor substrate, which
is proportional to temperature. In addition, several other sensors are
being investigated for measuring temperature as well as other process
variables, including: Fourier transform infrared (FTIR) spectroscopy sensors,
dual wavelength infrared (IR) pyrometers, IR cameras, and spectroscopic
The phenomena that occur during microwave processing are nonlinear and not well understood, particularly so for VFM processing. Therefore, there is a need for process characterization and modeling. Statistically designed experiments will be performed to model process parameters for VFM processes. Such experiments will include controllable parameters in a VFM system, such as center frequency, bandwidth, sweep rate, and ramp rate. Neural network-based models may be generated from the data resulting from these experiments. The output of these models may be used in conjunction with genetic algorithms or other search schemes to find optimal process recipes. Models are also being developed to facilitate intelligent control strategies. Intelligent controls methods that will be considered for VFM processing are neuro-fuzzy networks, expert systems, and hierarchical control.
High-volume manufacturing of high quality compound semiconductor devices requires precise control of the molecular beam epitaxy (MBE) process. The MBE process can be monitored in-situ using reflection high-energy electron diffraction (RHEED). The RHEED pattern maps the surface structure of the growing layer. In addition, the growth rate can be determined using the RHEED intensity oscillations.
Recently, one approach to model the MBE process using the RHEED intensity
oscillations has been proposed. In this technique, the dimensionality of the
RHEED data set is reduced using principal component analysis (PCA). The first
few principal components are used as the inputs of a neural network that models
the MBE responses.
The goal of this project is the development of a run-to-run and/or real-time closed-loop MBE control system. Based on the RHEED patterns, the control system will be able to adjust the process variables to improve the quality of the grown films.
The overall goal of this research was to develop and implement a tool for the real-time diagnosis of IC fabrication processes. The approach taken focused on integrating neural networks into a knowledge-based expert system. A working prototype for this hybrid diagnostic system has been implemented on the Plasma Therm 700 series reactive ion etcher (RIE) located in the Georgia Tech Microelectronic Research Center, with the ultimate objective of outlining general diagnostic strategy applicable to other rapid single-wafer processes.
This diagnostic system employs evidential reasoning to identify malfunctions by combining various evidences originating from equipment maintenance history, on-line sensor data, and in-line post-process measurements. Neural networks are used in the maintenance phase of diagnosis to approximate the functional form of the failure history distribution of each component. Predicted failure rates are subsequently converted to belief levels. For on-line diagnosis in the case of previously unencountered faults, a CUSUM control chart is implemented on real sensor data to detect very small process shifts and their trends. The accumulated process shifts are then filtered through a continuously varying sigmoid belief function to generate the evidential belief level. For the known fault case, hypothesis testing on the statistical mean and variance of the sensor data is performed to search for similar data patterns and assign belief levels. Finally, neural process models of RIE figures of merit (such as etch uniformity) are used to analyze the in-line measurements, and identify the most suitable candidate among faulty input parameters (such as gas flow) to explain process shifts.
This methodology offers several advantages over traditional techniques. First, it yields a stable and reliable ranked list of fault possibilities, even in the presence of significant measurement noise (due to the inherent noise resistance of neural networks). In addition, the rapidly established varying degrees of belief in each stage of diagnosis aids in the early detection of suspicious trends, often prior to an actual failure occurrences. The diagnostic routines are written in C++ and implemented on a Sun-class workstation which may be linked directly to the etcher.
To mitigate capital equipment investments and enhance product quality,
semiconductor manufactures are turning to advanced process control (APC)
methods. With the objective of facilitating APC, this project investigates a
methodology for real-time malfunction diagnosis of reactive ion etching (RIE)
employing two types of in-situ metrology: optical emission spectroscopy (OES)
and residual gas analysis (RGA). Based on metrology data, time series neural
networks (TSNNs) are trained to generate evidential belief for potential
malfunctions in real time, and Dempster-Shafer theory is adopted for evidential
reasoning. Successful malfunction diagnosis is achieved, with only a single
missed alarm and a single false alarm occurring out of 21 test runs when both
sensors are used in tandem. From the results, we conclude that the OES and RGA
sensors, in conjunction with the TSNN models, can be effectively used for RIE
monitoring and diagnosis. Furthermore, Dempster-Shafer theory is shown to be an
appropriate inference methodology.
The real-time diagnosis and prognosis of malfunctions is currently under investigation. The development of prognosis system capable of predicting potential equipment excursions for several lots of processed wafers into the future is a capability that would be extremely valuable to the IC industry. The prognostic system will also make use of neural networks to construct time series models of the tool data and generate a malfunction alarm when the model predicts indicate the evolution of suspicious trends in the data, thereby facilitating the early detection of equipment faults, prior to an actual failure occurrence. This will increase yield, as well as reduce machine down time.
In this project, a novel technique implementing statistical experimental design and neural networks (NNs) are used to characterize and model the excimer laser ablation process for microvia formation. Vias with diameters from 10 - 50 um have been ablated in DuPont Kapton E polyimide using an Anvik HexScan 2150 SXE pulsed excimer laser operating at 308 nm. Accurate NN models with prediction errors less than 6%, which are developed from experimental data, are obtained for several microvia characteristics, including ablated thickness, via diameter and wall angle. In addition, prediction error of less than 15% is obtained for a via resistance model. The NN models are used to perform sensitivity analysis and derive response surfaces to obtain insight on trends and impact of laser system parameters on microvia characteristics. Subsequently, NNs and genetic algorithms (GAs) are utilized to generate optimized process recipes for the laser tool. Such recipes provide the capability to produce desired target responses, including specific via diameter, steeper wall angle, and low via resistance. The improvement achieved over the non-optimized recipes (i.e., those recipes used during the designed experiment) and the optimal recipes is as large as 40% for the ablated thickness response, 30% for top via diameter, 9% for via wall angle, and >100% for via resistance.
With continuing advancement in the use of excimer laser systems in microsystems
packaging has come an increasing need to offset capital equipment investment
and lower equipment downtime. Since microvia characteristics are
process-dependent and the process is tool-dependent, when a process shifts, the
characteristics deviate from targets. Such shifts are often indicative of
necessary process adjustments or failures. Therefore, there is a need for fast,
accurate, and robust automated malfunction detection and diagnosis. In this
thesis, an automated in-line failure diagnosis system using neural networks and
Dempster-Shafer (D-S) theory is implemented. For the sake of comparison, a
neuro-fuzzy logic approach is also applied to achieve the same objective. Both
the D-S theory and neuro-fuzzy logic are used to develop an automated inference
system to specifically identify failures. Successful failure detection (100%)
is achieved using NNs in 19 possible failure scenarios. Using ANFIS, only a
single false alarm occurs. Successful failure diagnosis is also achieved using
NN-DS technique: a single false alarm occurs in 19 possible failure scenarios.
Using ANFIS, a single false alarm and a single missed alarm occur.
In essence, the four specific objectives for this research are the following: (1) to characterize and model the laser ablation process for microvia formation; (2) to optimize the ablation process for specific target responses; (3) to detect possible failures in the process; (4) to diagnose the possible sources of failures. The result of this investigation will benefit both engineering and management. Engineers will benefit from high yield, reliable production, and low equipment down-time. Business people, on the other hand, will benefit from cost-savings resulting from more production-worthy (i.e., lower maintenance) laser ablation equipment.
The overall goal of this research is to develop software tools which can
predict parametric integrated circuit performance when provided with
circuit design information (in the form of standard SPICE circuit
description files) and process information (in the form of sample data
from test devices). Two techniques are being explored for accomplishing
this goal: the use of multivariate nested probability density functions to
model process variability, and the use of a deterministic discrete mapping
technique to replace the stochastic Monte Carlo algorithm.
Multivariate nested distributions offer significant improvement to the modeling capabilities of the commonly used multivariate normal distribution, modeling not only the correlation among parameters within a device, but also the correlation between similar parameters in different devices. The nested distribution parameters provide insight into sources of process variability, and allow superior modeling of circuits containing matched devices without the need to develop special matched-device models. The nested model is backward compatible with existing multinormal models.
The Monte Carlo algorithm is commonly used to predict the distribution of circuit output parameters when given a distribution of process parameters. By discretizing the range of the process probability distribution, predicting a set of circuit performance characteristics for each point in that range, and then constructing a probability density function from the resulting data sets, the same function is performed in a deterministic, repeatable manner.
This work promises a number of potential applications. For circuit designers, it offers a straightforward technique to optimize circuit yield given any set of specifications and process test data. For process engineers, it offers a tool to determine the optimum process target values for providing maximum yield, to explore the impact which process modifications will have on parametric circuit yield, and to focus improvement efforts on those areas most likely to be causing variation. For production control specialists, it promises the capability to more accurately predict circuit yield and breakdown of yield based on performance characteristics (such as access time in RAMs) to enable product binning at an earlier stage in the manufacturing process. All of the techniques being considered have been implemented in an object oriented C++ software package called the Probabilistic Output Parameter Extractor and Yield Estimator, or POPEYE.
The objectives of the proposed research are to: 1) accurately model the reliability of GaAs multiple quantum well (MQW) avalanche photodiodes (APDs); and 2) develop a methodology for statistical yield prediction of the parametric performance of these devices, given certain realities of their fabrication process.
Thus far, reliability modeling of undoped, doped-barrier, and doped-well GaAs
MQW APDs has been performed via accelerated life testing, and failure mode
analysis was conducted using the electron beam-induced current method and
capacitance-voltage measurements. Reliability modeling allows the prediction
of device lifetime as a function of process variables, but even in a
defect-free manufacturing environment, random variations in the fabrication
process will lead to varying levels of device performance. These manufacturing
variations result from the fluctuation of various physical parameters (i.e.,
doping concentration, layer thickness, etc.), which in turn manifest themselves
first as variations in APD device operation (as characterized by breakdown
voltage or dark current), and finally as variations in device performance
metrics (such as gain, noise and device lifetime).
Accurate comprehensive device performance prediction requires precise characterization of these variations. Therefore, a methodology for modeling parametric performance based on manufacturing variations is also being developed. This methodology requires a model to be developed which reflects the probability distribution of each of the relevant process variables. This model can be obtained directly from measured process data. A second model is then required to account for the correlation between this measured process data and device performance metrics. This can be derived either from the evaluation of analytical expressions relating process variables to performance or through device simulation. The availability of the above models enables the computation of the joint probability density function required for predicting performance using the Jacobian transformation method, which converts the process variable distributions to the device performance metric distributions. The resulting density function can then be numerically integrated to determine parametric yield. Neural networks are proposed as the preferred tool for generating these models.
Upon successful completion, this new methodology will: 1) provide device designers with the ability to understand the manufacturability of various design options; and 2) enable process engineers to extrapolate the consequences of process modifications by processing a relatively small set of test structures. These capabilities will ultimately allow device yield prediction prior to high-volume manufacturing in order to evaluate the impact of both design decisions and process capability. In the applying this methodology to the MQW APDs, it will be shown that using a small number of test devices with varying active diameters, barrier and well widths, and doping concentrations enables accurate prediction of the expected performance variation of APD lifetime, gain, and noise in large populations of devices.
The revolutionary developments in wireless and mobile technology require complex device, circuit and package designs. The modern microwave components require improved computer aided design (CAD) techniques for accurate modeling and design. The current design methods are either simplistic and lack accuracy or are too complex to design and optimize. Artificial intelligence methods like neural networks and genetic algorithms are becoming increasing popular in microwave circuit design and optimization. This work involves study of neural network and genetic algorithm based design of microwave circuits.
In this research a new combined neural network and genetic algorithm based
approach called the neuro-genetic design methodology is presented. In this
method an accurate neural network model is developed from the experimental
data. This neural network model is used to perform sensitivity analysis and
derive response surfaces. An innovative technique is then applied in which
genetic optimization is coupled with the neural network model to assist in
device design and layout. The proposed method can assign priority to electrical
parameters to meet desired performance specifications within given design
constraints. The neuro-genetic algorithm based design has been used for design
and optimization of flip chip interconnects, multilayer inductors, and
capacitors with sufficient accuracy. The neuro-genetic algorithm based design
promises to minimize time and cost for microwave design, while providing high
This research involves validation of the proposed methodology on complex circuits like filters, SiGe heterojunction transistors, low noise amplifiers and voltage controlled oscillators. The proposed research also involves developing tools to extend the neuro-genetic design methodology to obtain designs that meet desired electrical specifications and are least sensitive to manufacturing variations. Thus, the study involves yield enhancement and design centering of microwave circuits and components. The proposed research involves: 1) the development of design and optimization methodology for complex microwave devices and circuits; 2) a feasibility study of applications of the proposed methodology on passive devices and active circuits; 3) the proposal of an integrated design methodology for circuit, package, and system level co-design; and 4) the development of a design strategy to determine those sets of design parameters that are least sensitive to the manufacturing variations and result in high yield.