LIBRARY IEEE;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_1164.all;

ENTITY parse2 IS
	PORT(
		clk										: IN	STD_LOGIC;
		InData									: IN	STD_LOGIC;
		PosEdge									: OUT	STD_LOGIC;
		OutData									: OUT	STD_LOGIC);
END parse2;

ARCHITECTURE a OF parse2 IS
	TYPE State_Type IS (Low,High);
	SIGNAL state  	: State_Type;
	SIGNAL counter	: STD_LOGIC_VECTOR(6 DOWNTO 0);
	SIGNAL tempOut	: STD_LOGIC;
BEGIN

	PROCESS (clk)

	BEGIN
		IF(clk'EVENT AND clk = '1') THEN			

			IF(InData = '1') THEN
				IF(Counter = "0111111") THEN
					tempOut <= '1';
				ELSE
					Counter <= Counter + 1;
				END IF;								

			END IF;

			CASE State IS
				WHEN LOW =>
					IF(InData = '1') THEN
						State <= High;
					END IF;
					PosEdge <= '0';
				WHEN HIGH =>
					IF(InData ='0') THEN          --reset	
						OutData <= tempOut;
						PosEdge <= '1';
						Counter <= "0000000";
						State <= Low;
						tempOut <= '0';
					END IF;
				WHEN Others =>
			END CASE;

		END IF;

	END PROCESS;

END a;