% Simulation Test Vectors for MIPS Processor Core - File: Top_spim.vec %
START 0us;
STOP 1500ns;
% Generate Clock %
INTERVAL 100ns;
INPUTS ClocK;
PATTERN 
0 1;
% Reset MIPS %
INPUTS Reset;
PATTERN
0>1
150>0;
OUTPUTS PC instruction_out Branch_out Zero_out read_data_1_out read_data_1_out ALU_result_out write_data_out Regwrite_out Memwrite_out;