Associate Professor/ School of Electrical and Computer Engineering/ Atlanta, GA 30332-0250
BIOGRAPHY
Jeffrey Alan Davis is an Associate Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. Dr. Davis received his B.E.E., M.S.E.E., and Ph.D. from Georgia Tech in 1993,1997, and 1999, respectively. In January 2001, he was awarded the National Science Foundation CAREER Award for excellence as a young educator and researcher. He has published over 60 journal, conference, and workshop papers. In 2002, he was the general chair for the International Workshop on System Level Interconnect Prediction, and he served as a guest editor for a special issue of the IEEE Transactions on VLSI Systems. He is currently the Faculty Chair of the ECE Student-Faculty Committee. In April 2003, he received the Outstanding Junior Faculty Award in the School of ECE at Georgia Tech. In April 2005, Dr. Davis received the 2004-2005 Class of 1940 W. Roane Beard Outstanding Teacher Award . His current research is focused on two branches of investigation, which include 1) sub-20 VLSI interconnect processing, characterization, modeling, and circuit design and 2) the study of energy density properties of metal insulator nanocomposite materials for high-energy density storage.
Advanced VLSI Interconnect Research
Global and semi-global VLSI interconnects are dominating the characteristics of modern digital ICs. As integration densities rapidly increase according to Moore's law and as minimum feature sizes rapidly reduce, interconnect limitations on high-performance (server), cost-performance (desktops), and low-power (portable) digital products are becoming greater every technology generation. Simply stated, the two main goals of this research group are: 1) to develop advanced interconnect models at the device, circuit, and system level to provide clear physical insight into some of the most compelling VLSI interconnect limiations , 2) to investigate novel solutions to help overcome these limitations, and 3) to use e-beam lithography to fabricate test structures to determine the limits (e.g. size effects on resistiity) on copper and aluminum wire technologies.
High Energy Density Metal-Insulator Nanocomposite Materials
Advanced VLSI processing has provided unparallelled control in creating minute patterns over the last 40 years. Such technology has made significant contributions to analog and digital circuit and photovoltaic applications. It is the premise of this research that energy storage devices can likewise benefit from this technology as it advances over the next 15 years. Unlike current battery technologies, new transformational energy storage devices need to be lightweight, long lasting, and fast charging with high power delivery capabilities. The objective of this research is to construct capacitive storage devices that push the energy density limits of metal-insulator nanocomposite materials in order to better study and understand how this technology can impact our society. This work will capitalize on experiments performed over the last 30-40 years that reported that under certain conditions metal-insulator nanocomposite materials can have an anomalous dielectric effect that produces extremely high dielectric constants. The goal of this research is to produce a unified theory to explain this phenonomem and to produce prototype devices by creating reproducible and homogeneous samples of these nanocomposite materials using e-beam lithography.