International Coverage and Visibility of Research and Publications:

1. Staff, “Making the connection,” The Economist (Print Edition), Jun. 2002.
• An entire article describing our Sea-of-Leads chip I/O interconnects
2. “ECTC Technology Flows,” IEEE CPMT Newsletter, Jun. 2002, http://ewh.ieee.org/soc/cpmt/newsletter/200206/cpmtnsltr-0206.pdf
   • Article describing our Sea-of-Leads chip I/O interconnects based on the ECTC 2002 paper (Best Conference Paper Award).
3. R. Wilson, “Session examines novel semiconductor devices,” EETimes, Feb. 12, 2003. http://www.eetimes.com/conf/isscc/showArticle.jhtml?articleID=18308034&kc=3681
• Article describing our novel electrical and optical chip I/Os based on the ISSCC 2003 paper.
4. R. Ball, “Polymer pillars can connect electrical and optical signals,” Electronics Weekly, Feb. 12, 2003 http://www.electronicsweekly.com/Articles/2003/02/12/28404/polymer-pillars-can-connect-electrical-and-optical-signals.htm
   • An entire article describing our novel electrical and optical chip I/Os based on the ISSCC 2003 paper. The article also features figures from the paper.
5. Staff, “ISSCC: polymer pillars used to connect die,” Electronics Weekly, Feb. 13, 2003. http://www.electronicsweekly.com/Articles/2003/02/13/28415/isscc-polymer-pillars-used-to-connect-die.htm
• An entire article describing our novel electrical and optical chip I/Os based on the ISSCC 2003 paper.
6. W. Wayt Gibbs, “Computing at the Speed of Light,” Scientific American, Nov. 2004. http://www.sciam.com/article.cfm?id=computing-at-the-speed-of
   • Article describing our novel electrical and optical chip I/Os based on the IEEE TED 2003 paper. A two-page figure was devoted to illustrate our technology in the magazine.
   • 
7. J. Baliga, “Polymer pillars for optical and electrical signals,” Semiconductor International, Dec. 1, 2004. http://www.semiconductor.net/article/CA483650.html?q=%22polymer+pillars%22
• An entire article describing our novel electrical and optical chip I/Os based on the ECTC 2004 paper.
8. R. Colin Johnson, “Water-filled wafers streamline chip cooling,” EETimes, Jul. 4, 2005. http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=165600142
   • An entire article describing our novel on-chip microfluidic interconnects based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
9. staff, “Cooling,” EETimes Asia, Jul. 8, 2005. http://www.eetasia.com/ART_8800371156_499495_NP_82f06612.HTM
• An entire article reporting our novel cooling technology.
10. S. Bush, “Fluid cooling plugs direct onto CMOS,” Electronics Weekly, Jul. 20, 2005. http://www.electronicsweekly.com/Articles/2005/07/20/35869/fluid-cooling-plugs-direct-onto-cmos.htm
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
11. staff, “Liquid cooling with microfluidic channels helps computer processors beat the heat,” PhysOrg.com, June 21, 2005. http://www.physorg.com/news4657.html
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
12. R. Colin Johnson, “Water-filled wafers streamline chip cooling,” EETimes Asia, Aug. 16, 2005 http://www.eetasia.com/ART_8800374234_480100_NT_205871dd.HTM
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
13. R. Allan, “Beat the heat with on-chip microfluidics,” Electronic Design, Oct. 13, 2005. http://electronicdesign.com/Articles/Print.cfm?AD=1&ArticleID=11178
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the  IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
14. Staff, “Sematech 3-D IC Workshop Considers Thermal, Design Issues,” Semiconductor International, Sept. 24, 2007 http://www.semiconductor.net/article/CA6481192.html
    • An article reporting our novel 3D integration and cooling technology based on the SEMATECH 2007 paper (invited).
15. Staff, “Leading IC Engineers to Gather in Albany at SEMATECH Workshop on 3D Chips,” Nanowerk Business News, Sept. 25, 2007. http://www.nanowerk.com/news/newsid=2695.php
• An article reporting our novel 3D integration and cooling technology based on the SEMATECH 2007 paper (invited).
16. B. Haavind, “Moore's Law to head z-ward?,” Solid-State Technology, Oct. 2007. http://www.solid-state.com/display_article/310451/5/ARTCL/none/none/1/Moore's-Law-to-head-z-ward?/
    • An article reporting our novel 3D integration and cooling technology based on the SEMATECH 2007 paper (invited).
17. R. Wilson, “Session examines novel semiconductor devices Tera-Level Nanodevices,” Nanotech, Feb. 15, 2003. Korea. www.nanotech.re.kr/pds/nano/Electronics%2520Forum-20030214.hwp+%22muhannad+bakir%22&hl=en&ct=clnk&cd=50&gl=us
• An entire article describing our novel electrical and optical chip I/Os based on the ISSCC 2003 paper.
18.  “Integrated microfluidic channels for liquid cooling of IC chips,” GT MiRC NewsLetter, Nov./Dec. 2005. http://atlas2.mirc.gatech.edu/news/nov_dec_newsletter.pdf
    • An entire article describing our novel on-chip microfluidic interconnects based on the IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
19. M. LaPedus, “IBM, GIT demo 3D die with microchannel cooling,” EETimes, Jun. 5, 2008. http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=208402305
• An entire article describing our novel 3D integration and cooling technology based on the IEEE IITC 2008 paper.
20. A. E. Braun, “IITC gives glimpse of future interconnect,” Semiconductor International, Jun. 2, 2008. http://www.semiconductor.net/article/CA6566002.html?desc=topstory
    • An article describing our novel 3D integration and cooling technology based on the IEEE IITC 2008 paper.
21. N. Mokhoff, “IITC reports on interconnect progress,” EETimes, May 9, 2008. http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=207601527
• An article describing our novel 3D integration and cooling technology based on the IEEE IITC 2008 paper.
22. J. Toon, “Beating the heat: liquid cooling technique uses microfluidic channels integrated onto the backs of chips,” Georgia Tech Research News, June 21, 2005. http://gtresearchnews.gatech.edu/newsrelease/cooling.htm
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
23. S. Henkel, “Microfluidic technology set to chill your chips,” Sensors Magazine, Aug. 1, 2005. http://www.highbeam.com/doc/1G1-155556050.html
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
24. staff, “New Liquid Cooling Technique,” Physics & Astronomy Online, Jun. 26, 2005. http://www.physlink.com/news/062605LiquidCooling.cfm
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
25. Staff, “Liquid cooling with microfluidic channels helps computer processors beat the heat,” Brightsurf Science News, June 21, 2005. http://www.brightsurf.com/news/headlines/20224/Liquid_cooling_with_microfluidic_channels_helps_computer_processors_beat_the_heat.html
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
26. Staff, “Microfluidic channels put liquid cooling on chip,” Power Electronics Technology, Jun. 29, 2005. Entire article. http://powerelectronics.com/news/microfluidic-liquid-cooling/
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
27. R. Comerford, “Chips get tiny channels for carrying liquid coolant,” Electronic Products, Aug. 2005. http://www2.electronicproducts.com/Chips_get_tiny_channels_for_carrying_liquid_coolant-article-olrc01-aug2005-html.aspx
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
28. staff, “Cooling for denser packaging and reliability,” III-V’s Review, Jun. 21, 2005.  http://www.three-fives.com/competitive_complementary_news/June_c_c_news/210605Cool_chip_pack.htm
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award). The article also features figures from the paper.
29. R. Norvell, “Beat the heat: GA Tech researchers find IC liquid cooling technique,” Circuits Assembly, June 24, 2005. http://circuitsassembly.com/cms/content/view/1747/95/
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
30. Staff, “Georgia Tech creates liquid cooling technique for high-density ICs,” Process Cooling, Jan. 18, 2006.  http://www.process-cooling.com/Articles/Industry_News/d7a208c7830e8010VgnVCM100000f932a8c0____
    • An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
31. R. Norvell, “Beating the heat: Georgia Tech researchers find IC liquid cooling technique,” All Business, Aug. 1, 2005. http://www.allbusiness.com/professional-scientific/computer-systems-design/499187-1.html
• An entire article describing our novel on-chip microfluidic interconnects for cooling based on the IEEE IITC 2005 paper (Best Conference Student Paper Award).
32. Staff, “IEEE International Interconnect Technology Conference goes 3D,” Advanced Packaging, May 7, 2008. http://ap.pennnet.com/display_article/327477/36/ARTCL/none/none/1/IEEE-International-Interconnect-Technology-Conference-Goes-3D/
    • An article describing our novel 3D integration and cooling technology based on the IEEE IITC 2008 paper.
33. Staff, “Cooling System Helps Chips Beat Heat,” High Productivity Computing, Jun. 24, 2005. http://www.hpcwire.com/offthewire/17874274.html
• An entire article describing our novel 3D integration and cooling technology based on the IEEE IITC 2008 paper.
34. K. Gurnett and T. Adams, “3-D integration begins to define its future” Electronics World, to appear late 2008.
    • An article describing our novel 3D integration and cooling technology based on the ECTC 2008 & IEEE IITC 2008 papers. The article also features figures from the papers.
35. K. Gurnett and T. Adams, “Up next: silicon-through vias” Military & Aerospace Electronics, to appear late 2008.
• An entire article describing our novel 3D integration and cooling technology based on the ECTC 2008 & IEEE IITC 2008 papers. The article also features figures from the papers.
36. F. Celeste and T. Adams, “3D Technology ” EETimes Asia, to appear late 2008.
• An entire article describing our novel 3D integration and cooling technology based on the ECTC 2008 & IEEE IITC 2008 papers. The article also features figures from the papers.
37. Our research on 3D technology was featured as one of the highlights from the five Focus Center Programs by DARPA in 2007.
38. Our research on 3D technology was featured as a main highlight in the 2007 SRC Annual Report, published May 2008.

 

Sea of Leads Chip I/Os Featured on the Cover the MRS Bulletin (Jan. 2003)



 

Moreover, our work on nanoimprint technology was discussed in this article.

 

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