Michael Healy
Michael Healy

Email to: mbhealy A T gatech D O T edu
PhD Student at the Georgia Institute of Technology

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BIO
Michael Healy received the B.S. and M.S. degrees from the School of Electrical and Computer Engineering at the Georgia Institute of Technology in 2004 and 2006, respectively. From 2006 to 2007 he interned with Intel and worked in the Penryn architecture team on their first 45nm processor. Since then he has been working on the final leg of his Ph.D. at the Georgia Institute of Technology. His overall research focus is on 3D integration technology and the rewards and challenges it brings to the semiconductor industry. His research has spanned a broad range of work and includes placement for configurable architectures, thermal/performance trade offs in 2D and 3D microarchitectural floorplanning, power-supply-noise-aware microarchitectural floorplanning, and multi-granularity thermal-aware floorplanning for multi-core architectures. His current interest is in the future of 3D systems and the design problems inherent in large-scale 3D integration.

Update: I successfully defended the thesis of my dissertation in August, 2010. I am currently working as a post-doctoral researcher at IBM mbhealy [AT] us.ibm.com