Mohit Pathak

Georgia Institute of Technology
PhD student
mohitp at ece.gatech.edu
GTCAD LAB

950 Marietta Street,
Apartment # 1203,
Atlanta, GA 30318-5599
Telephone: 404-319-0348

Objective:	Internship position in a competitive environment which leads to personal and professional development.
Eductaion:
2005-present	Georgia Institute of Technology, Atlanta, Georgia Ph.D. candidate in Electrical and Computer Engineering G.P.A. 3.7/4.0
2000-2004	Indian Institute of Technology, Kharagpur, India B.Tech. (Hons) in Computer Science and Engineering G.P.A 8.95/10.0
Experience:
2005-present	Graduate Research Assistant, School of Electrical and Computer Engineering, Georgia Institute of Technology
2004-2005	Member Technical Staff, Magma Design Automation,Bangalore, India

Publications:

Mohit Pathak and Sung Kyu Lim, "Thermal-aware Steiner Routing for 3D Stacked ICs," to appear in IEEE International Conference on Computer-Aided Design, 2007
Mohit Pathak, Souvik Mukherkee, Madhavan Swaminathan, Ege Engin, and Sung Kyu Lim, "Placement and Routing of RF Embedded Passive Designs In LCP Substrate", to appear in IEEE International Conference on Computer Design, 2007.
Jacob Minz, Mohit Pathak, and Sung Kyu Lim, "Net and Pin Distribution for 3D Package Global Routing," Design, Automation and Test in Europe, pp. 1410-1411, 2004.
Ramprasad Ravichandran, Jacob Minz, Mohit Pathak, Siddharth Easwar, and Sung Kyu Lim, "Physical Layout Automation for System-On-Packages," IEEE Electronic Components and Technology Conference, pp. 41-48, 2004.
Jacob Minz, Eric Wong, Mohit Pathak, and Sung Kyu Lim, "Placement and Routing for 3D System-On-Package Designs," to appear in IEEE Transactions on Components and Packaging Technologies.

Skills:

References Provided on request.

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