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	Moinuddin K. Qureshi Associate Professor Computer Systems and Software School of Electrical and Computer Engineering Recipient of NetApp Faculty Fellowship (2012) Recipient of Intel Early Career Award (2012) Phone: 404.385.0715 Fax: 404.894.4641 Office: Klaus 2312, 266 Ferst Drive, Atlanta GA 30313 Email: moin at ece dot gatech dot edu Bio
Teaching Spring 2013: Architecture, Concurrency, and Energy Spring 2013: Advanced Topics in Memory Systems Fall 2012: Advanced Computer Architecture Spring 2012: Advanced Topics in Memory Systems Book: Phase Change Memory: From Devices to Systems (Synthesis Lectures on Computer Architecture) by Moinuddin K. Qureshi, Sudhanva Gurumurthi and Bipin Rajendran, Morgan Claypool Publishers Dec 2011 Publications (Link to Google Scholar page) 2013 ArchShield: Architectural Framework for Assisting DRAM Scaling by Tolerating High Error Rates Prashant Nair, Daehyun Kim, and Moinuddin K. Qureshi To appear in the International Symposium on Computer Architecture (ISCA) 2013 Operating SECDED Based Caches at Ultra-Low Voltage with FLAIR Moinuddin K. Qureshi and Zeshan Chishti To appear in the International Conference on Dependable Systems and Network (DSN) 2013 A Case for Refresh Pausing in DRAM Memory Systems (pdf) Prashant Nair, Chia-Chen Chou, and Moinuddin K. Qureshi Appear in the International Symposium on High Performance Computer Architecture (HPCA) 2013 2012 Fundamental Latency Trade-offs in Architecting DRAM Caches (pdf, slides) Moinuddin K. Qureshi and Gabriel Loh Appears in the International Symposium on Microarchitecture (MICRO) 2012 FLEXclusion: Balancing Capacity and On-Chip Traffic via Flexible Exclusion (pdf) J. Sim, J. Lee, Moinuddin K. Qureshi, and Hyesoon Kim Appears in the International Symposium on Computer Architecture (ISCA) 2012 PreSET: Improving Read Write Performance of Phase Change Memories by Exploiting Asymmetry in Write Times (pdf, slides) Moinuddin K. Qureshi, Michele Franceschini, Luis Lastras and Ashish Jagmohan Appears in the International Symposium on Computer Architecture (ISCA) 2012 2011 Pay-As-You-Go: Low Overhead Hard-Error Correction for Phase Change Memories (pdf, slides) Moinuddin K. Qureshi Appears in the International Symposium on Microarchitecture (MICRO) 2011 Practical and Secure PCM Systems by Online Detection of Malicious Write Streams (pdf, slides) Moinuddin K. Qureshi, Andre Seznec, Luis Lastras, Michele Franceschini Appears in the International Conference on High Performance Computer Architecture (HPCA) 2011 2010 Feedback Driven Pipelined Parallelism. M. Aater Suleman, Moinuddin K. Qureshi, Khubaib, and Yale N. Patt Appears in the International Conference on Parallel Architecture and Compilation Technique (PACT) 2010. Morphable Memory System: A Robust Architecture for Exploiting Multi-Level Phase Change Memories. Moinuddin K. Qureshi, Michele Franceschini, Luis Lastras, and John Karidis Appears in the International Symposium on Computer Architecture (ISCA) 2010. Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures. M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt Appears in the IEEE MICRO Special Issue on Top Picks from Microarchitecture Conferences (IEEE MICRO 2010). Improving Read Performance of Phase Change Memories via Write Cancellation and Write Pausing. Moinuddin K. Qureshi, Michele Franceschini and Luis Lastras Appears in the International Symposium on High Performance Computer Architecture (HPCA) 2010. 2009 Enhancing Lifetime and Security of Phase Change Memories via Start-Gap Wear Leveling. Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Viji Srinivasan, Luis Lastras and Bulent Abali Appears in the International Symposium on Microarchitecture (MICRO) 2009. A Tagless Coherence Directory. Jason Zebchuk, Viji Srinivasan, Moinuddin K. Qureshi, and Andreas Moshovos Appears in the International Symposium on Microarchitecture (MICRO) 2009. Scalable High-Performance Main Memory System Using Phase-Change Memory Technology. Moinuddin K. Qureshi, Viji Srinivasan, and Jude A. Rivers Appears in the International Symposium on Computer Architecture (ISCA) 2009. Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures. M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt Appears in the International Conference on Architectural Support for Programming Language and Operating Systems (ASPLOS) 2009. (One of the 13 computer architecture papers of 2009 selected as Top Picks by IEEE Micro) Adaptive Spill-Receive for Robust High-Performance Caching in CMPs. Moinuddin K. Qureshi Appears in the International Conference on High Performance Computer Architecture (HPCA) 2009. 2008 Adaptive Insertion Policies for Managing Shared Caches. Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qureshi, Julien Sebot, Simon Stelly Jr. and Joel Emer Appears in the International Conference on Parallel Architectures and Compiler Techniques (PACT) 2008. Feedback Driven Threading: Power-Efficient and High-Performance Execution of Multithreaded Workloads on CMPs. M. Aater Suleman, Moinuddin K. Qureshi, and Yale N. Patt. Appears in the International Conference on Architectural Support for Programming Language and Operating Systems (ASPLOS) 2008. Set-Dueling Controlled Adapative Insertion for High-Performance Caching. Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., and Joel Emer. Appears in the IEEE MICRO Special Issue on Top Picks from Microarchitecture Conferences (IEEE MICRO 2008). 2007 Adaptive Insertion Policies for High-Performance Caching. Moinuddin K.Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., and Joel Emer. Appears in the International Symposium on Computer Architecture (ISCA) 2007 (One of the 10 computer architecture papers of 2007 selected as Top Picks by IEEE Micro) Line Distillation: Increasing Cache Capacity by Filtering Unused Words in Cache Lines. Moinuddin K. Qureshi, M. Aater Suleman, and Yale N. Patt. Appears in the International Symposium on High-Performance Computer Architecture (HPCA) 2007. 2006 Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches. Moinuddin K. Qureshi and Yale N. Patt. Appears in the International Symposium on Microarchitecture (MICRO) 2006. A Case for MLP-Aware Cache Replacement. Moinuddin K. Qureshi, Daniel Lynch, Onur Mutlu, and Yale N. Patt. Appears in the International Symposium on Computer Architecture (ISCA) 2006. 2005 The V-Way Cache: Demand Based Associativity via Global Replacement. Moinuddin K. Qureshi, David Thompson, and Yale N. Patt. Appears in the International Symposium on Computer Architecture (ISCA) 2005. Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors. Moinuddin K. Qureshi, Onur Mutlu, and Yale N. Patt. Appears in the IEEE International Conference on Dependable Systems and Networks (DSN) 2005.
" In a good cause there are no failures, there are only delayed successes" - Asimov

Moinuddin K. Qureshi