Click here EE 6175 RISC Architecture Design
last modified 1:10pm 11 February 1999
COURSE DESCRIPTION: This design-oriented course focuses on principles
and techniques in high performance RISC architectures. Architectural
concepts and case-studies are combined with simulation projects to
provide an in-depth understanding of the area.
PREREQUISITES: graduate standing, CmpE 3510 or equivalent, programming experience.
READINGS: Readings (handed out in class and available on the web) will explore different aspects of state-of-the-art processing systems.
EXAMS: There will be two take-home exams, each worth 25% of the class grade. The due dates will be 2 February 1999 and 2 March 1999 . There is no final exam in this class.
PROJECT: The projects for the class (worth 50% of the class grade) addresses the operations of a modern microprocessor. In-class design teams of two students will complete a series of experiments complemented by web-based studies. Projects are due on 15 March 1999 at noon. Video students will address focused project objectives that can be completed alone.
CONTACT INFO: Scott Wills (ECE), CCB 315, (404) 894-7469, scott.wills@ece.gatech.edu.
Project Material
Project REVISED 11 February 1999
Trace Format Guide (see slides
39-42 for instruction formats)
