Ph.D. Graduates

Dr. Senyo Apewokin is currently a research engineer at Texas Instruments Incorporated. He received His M.S.E.C.E. degree from Georgia Tech in 2003 and his B.S. E.C.E. from Louisiana State University in 2001. He received his Ph.D. in Electrical and Computer Engineering at Georgia Tech in 2009. His doctoral thesis addressed efficiently mapping high-performance early vision algorithms onto multicore embedded platforms. His research interests include microprocessor design for multimedia and embedded systems and low-power computer architectures.

Dr. James M. Baker Jr. is an Professor of Computer Science at Virginia Military Institute. He received his BS and MS degrees in Electrical Engineering from Virginia Tech in 1988 and 1990, respectively. He received his Ph.D. in Electrical and Computer Engineering at Georgia Tech in 1998. His doctoral thesis addressed run-time operating systems for fine-grain parallel architectures. His research interests include computer architecture, parallel processing, and system software. He is a member of the IEEE, the IEEE Computer Society, and the ACM. He and his wife, Mary Beth have two children, Ellie and James.

Dr. M. Ryan Bales received his B.S. in Computer Engineering and his M.S. in Electrical Engineering from the University of Missouri – Rolla (now the Missouri University of Science and Technology) in 2004 and 2006, respectively. He received his Ph.D. in Electrical and Computer Engineering at Georgia Tech in 2011. His doctoral thesis addressed illumination compensation in video surveillance analysis. He is currently employed at GTRI-SEAL, where he works on FPGA designs for radar and video processing hardware. His research interests include image and video processing, FGPA and embedded systems design, and multi-valued logic. He is a member of IEEE and Eta Kappa Nu.

Dr. Santithorn Bunchua received his B.Eng in Computer Engineering from Assumption University, Thailand in 1995, and his M.S. and Ph.D. in Electrical & Computer Engineering from Georgia Institute of Technology in 1999 and 2004. He is currently an Assistant Professor. His research interests include parallel and high performance computer architectures.

Dr. Sek Chai is a Technical Manager at SRI International Sarnoff, where he leads architecture developments on embedded computing activities. Prior to joining SRI Sarnoff, he developed imaging and video solutions for next generation mobile devices and home broadband products at Motorola Labs. Before joining Motorola, he worked at IBM's Lower Layer Conformance Test Center in Research Triangle Park and IBM's Multimedia Lab in Atlanta (PCTV product). He has a BSEE, MSEE, and Ph.D ('99) in Electrical Engineering from Georgia Institute of Technology. He co-founded ComputerVisionCentral.com, a leading on-line community for computer vision and related technologies. He oversees the Embedded Computer Vision Workshop, and annual event held in conjunction with CVPR or ICCV. He is a senior member of IEEE and ACM.

Dr. Kee Shik Chung is a member of the technical staff at Intel Corporation in Chandler, AZ. He received his Ingeniero Electronico diploma from Universidad de Buenos Aires (Argentina) in 1991, and his Master of Science in Electrical Engineering in 1993 from University of Southern California. He received his Ph.D. in Electrical and Computer Engineering (2000) from Georgia Tech. His doctoral research addresses instruction level SIMD Architectures and short wire instruction broadcast for SIMD architectures. Dr. Chung's research interests include Image Processing Architectures, Parallel Computing, Interconnection Networks, and Low Power VLSI Design.

Dr. Lucian Codrescu received the B.S. degree in computer engineering from Virginia Polytechnic Institute, Blacksburg, VA, in 1993. He received the M.S. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology in 1997 and 2000, respectively. His doctoral thesis addresses techniques for parallel execution of sequential programs on a multithreaded architecture including mem-slicing partitioning and data partitioning. He is currently a Lead Computer Architect with Motorola in Austin, TX working in the area of high performance embedded architecture and micro-architecture. His research interests include architectures and compilers for computationally demanding but cost and power sensitive embedded systems.

Dr. José L. Cruz-Rivera received the B.S.E.E. degree from the University of Puerto Rico-Mayagüez in 1991 (Magna Cum Laude) and the M.S. and Ph.D. degrees in Electrical Engineering from the Georgia Institute of Technology in 1992 and 1996, respectively. He has served as Chairman of the Department of Electrical and Computer Engineering and Dean of Academic Affairs at the University of Puerto Rico-Mayagüez where he holds the rank of Professor. He is a 1997 NSF Career award recipient, 1999 Distinguished Professor of Electrical and Computer Engineering (UPRM), 1999 Frontiers in Education Fellow, and a Senior Member of the IEEE. Dr. Cruz Rivera is currently serving as a Chief Technology Officer of Commoca, Inc. a high-tech startup in the field of VoIP converged communications.

Dr. Mondira Pant (Deb) is currently a hardware engineer in the Alpha Development Group of Compaq Computer Corporation in Shrewsbury, MA. She received her B.Tech degree in Computer Science and Engineering from IIT Kharagpur, India, in 1995. She earned her MSEE and PhD degrees in 1997 and 2000 respectively from Georgia Institute of Technology. Her research addressed the growing problem of on-chip inductive noise in GSI circuits from an architect's standpoint. Her research interests include VLSI design, high-performance architectures and apporaches to solving inductive noise in these systems. She is an currently an IEEE and IEEE Computer Society member.

Dr. John C. Eble is currently a member of the technical staff at Velio Communications in Chapel Hill, NC. He formally was employed as a staff engineer at Compaq in Shrewsbury, MA. He received his BCmpE in Computer Engineering and MSEE and Ph.D. in Electrical and Computer Engineering from Georgia Tech in 1993, 1994, and 1998 respectively. His doctoral research addressed the development of a generic system simulator, GENESYS, and architectural models for performance and efficiency of microprocessors. His research interests include low-power, high-throughput programmable image processing architectures and generic system and architecture performance modeling. He is a member of the IEEE and ACM.

Dr. Antonio Gentile is currently Assistant Professor at the Department of Automatics and Computer Science of the University of Palermo, Italy. Dr. Gentile received his Dr. Ing. degree (M.S.E.E.) in Electrical Engineering and his doctoral degree in Computer Science from the University of Palermo in 1992 and 1996, respectively. He also received his Ph.D. in Electrical and Computer Engineering from the Georgia Institute of Technology, Atlanta (USA), in 2000, directed by Prof. D. Scott Wills. His research interests include high performance computer architectures, parallel computing, image processing, and VLSI design. Dr. Gentile is member of the Portable Image Computation Architecture (PICA) Group, of the IEEE Society, of the IEEE Computer Society, and of the ACM Society. Dr. Gentile can be contacted at antonio.gentile@unipa.it.

Dr. Cory Hawkins is currently working for Alltel Communications Inc in their corporate headquarters in Alpharetta, GA. He received all of his degrees from Georgia Tech -- a Bachelors of Computer Engineering in 2000 (with highest honors), a Masters of Electrical and Computer Engineering in 2001, and a PhD in Electrical and Computer Engineering in 2007. His graduate work focused on modeling, simulating, and improving the performance of the Data Vortex optical interconnection network. He is a member of IEEE and both the IEEE Computer and Communications Societies.

Dr. Michael Hopper is a Senior Software Engineer at Fundtech Corporation in Atlanta, Georgia, a provider of OLTP banking applications. He is involved with transaction processing applications on heterogeneous platforms in CORBA, Java, C++, XML, and Oracle. He received his BSEE and MSEE degrees from the University of Alabama in 1989 and 1991. He received his Ph.D. from Georgia Tech in 1997. He is a member of IEEE as well as the Eta Kappa Nu and Tau Beta Pi honor societies.

Dr. Hongkyu Kim is an senior engineer at Samsung Corporation. He received his B.S. in Electronic Engineering from Yonsei University , Korea in 1995. He earned his Ph.D. in Electrical & Computer Engineering at Georgia Tech in 2007. His dissertation area included optimizing operand transportation in interconnect-centric architectures. Previously he worked as a digital design engineer (February 1995 - July 2001) for Samsung. His responsibilities included designing and implementing digital signal processors (DSP) and microcontrollers for digital multimedia applications.

Dr. Jongmyon Kim is a Professor in the School of Computer Engineering & Information Technology at Ulsan University in Korea. His research areas include Embedded systems, Application specific SoC Design, Computer Architectures, and Parallel Processing. Prior to joining Ulsan University, he was an engineer at Samsung Corporation. He received his Ph.D. from Georgia Tech in May 2005. He received his Master of Science in Electrical and Computer Engineering from University of Florida, Gainesville, in 2000. During his graduate period, he served as a manager for all ECE online courses (August 1998 - July 2000). Before joining the graduate program, he worked as an engineer (January 1995 - November 1995) for Dae-Woo E&C Company and received his Bachelor degree in Electrical Engineering from Myong-Ji University, South Korea, in 1995. His current research interests include color-aware instruction set architectures, energy-aware and high-performance processor architectures, and embedded video-processing applications. He is a student member of the IEEE, the IEEE Computer Society, and the IS&T/SPIE.

Dr. W. Stephen Lacy received the B.S. degree in electrical engineering from Christian Brothers University (Memphis, TN) in 1991, and the M.S.E.E. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology in 1993 and 1996, respectively. At Georgia Tech, Dr. Lacy was a founding student member of the Portable Image Computation Architecture (PICA) group where he performed research in fine-grained parallel computing and multicomputer interconnection networks. Dr. Lacy is currently a member of the technical staff at Synopsis in Santa Clara, CA. Dr. Lacy's research interests include VLSI systems design, interconnection networks, and architectures for parallel and distributed computation. Dr. Lacy is a member of the IEEE Computer Society, and of the Tau Beta Pi and Phi Beta Kappa academic honor societies.

Dr. Abelardo López-Lagunas is an assistant professor in the Instituto Tecnologico y de Estudios Superiores de Monterrey Campus Toluca. He received his B.S. in Electrical Engineering from that institution in 1988, his M.S. degree (1991) and Ph.D. (1997) in Electrical and Computer Engineering from the Georgia Institute of Technology. As a graduate student he formed part of the Portable Image Computation Architecture (PICA) group directed by Dr. D. Scott Wills. His doctoral research focused on hardware support for fine-grain architectures. In 1998, he joined the Concurrent VLSI Architecture Group, led by Dr. William J. Dally in the design of the Imagine processor at Stanford. His research interests include Parallel Architectures, VLSI design, and parallel compilers. He is a member of the IEEE and the IEEE Computer Society.

Dr. Phil May is a Senior Staff Engineer at the Digital DNA System Architecture Lab at Motorola in Schaumburg, Illinois. He received his BSE EE from the University of Michigan in 1987. From 1987 until 1994 he was employed by Motorola's Government and Space Technology Group. At Motorola he designed circuits and systems for communications applications. Dr. May completed his Ph.D. in Electrical and Computer Engineering at Georgia Tech in 1999. His research interests include parallel architecture, interconnection networks, and system and circuit design for VLSI.

Dr. Steve Nugent graduated with a Ph.D. from Georgia Tech in July 2005. He was a graduate student in the Gigascale Integration (GSI) and Portable Image Computation Architectures (PICA) research groups at Georgia Institute of Technology. He received his Bachelor of Electrical Engineering from Georgia Tech in December 1997. A Georgia native, his research interests include GSI systems performance, the development of a generic systems simulator (GENESYS) and the technology/architecture modeling of heterogeneous systems-on-a-chip.

Dr. William H. Robinson is an Associate Professor in Electrical Engineering at Vanderbilt University in Nashville, Tennessee. He received his B.S. in electrical engineering from Florida Agricultural and Mechanical University in 1996 and his M.S. in electrical engineering from Georgia Institute of Technology (Georgia Tech) in 1998. He received his Ph.D. in Electrical and Computer Engineering at Georgia Tech in 2003. His research explores the system-level integration of computer architecture to understand the impact of technology on architecture design. Topics of interest include VLSI design, parallel computer architectures, and image processing. He is a 1996 National Science Foundation Graduate Fellow and a 2002 Ford Foundation Dissertation Fellow. His IEEE membership includes both the Computer Society and the Lasers and Electro-Optics Society. Other professional memberships include the American Society of Engineering Educators (ASEE), National Society of Black Engineers (NSBE), and SPIE - The International Society for Optical Engineering.

Dr. Soo-Jung Ryu is a Engineer at Samsung Corperation. She received her B.S. (valedictorian) degree in Computer Science from the Dong-Duk Women's University (Korea) in 1994, her Master of Science in Information and Communication Engineering from KAIST (Korea) in 1996, and her Ph.D. in Electrical & Computer Engineering from Georgia Institute of Technology in 2003. She was employed by KAIST as a research engineer (August 1996 - July 1997). At KAIST she designed and implemented a query optimizer for Spatial DBMS. Her current research interests include parallel architecture, explicit parallel application programming, compiler, and the simulation of the high performance parallel architecture.

Dr. Peter Sassone is currently working at Intel. He received his Bachelors of CMPE in December 2000, Masters of ECE in May 2002, and Ph.D. In ECE July 2005, all from Georgia Tech. During his undergraduate time, he served a head teaching assistant for Object Oriented Programming, developing course material for 800+ students while teaching recitations and lectures. His research interests include dynamic multithreading, chip-multiprocessors, I/O bandwidth, and dataflow-controlflow interaction.

Dr. Tarek Taha is currently an Associate Professor in Electrical & Computer Engineering at University of Dayton in Dayton, Ohio. He received his Bachelor of Electrical Engineering at Georgia Tech and Bachelor of Arts at DePauw University, both in 1996. He received his Masters of Electrical Engineering at Georgia Tech in 1998 and his Ph.D. in Electrical & Computer Enginering at Georgia Tech in 2002. His research interests include computer architecture, high performance computing, high throughput neuromorphic computing, memristor based architectures, reconfigurable computing, processor performance prediction. He is a member of the IEEE and the Computer Society.

Dr. Brian Valentine is research Engineer at Texas Instruments Incorporated. He received his Bachelor of Electrical Engineering at Morgan State University in 2003 and his Masters of Electrical Engineering at Morgan State University in 2005. He received his Ph.D. in Electrical & Computer Enginering at Georgia Tech in 2010. His doctoral thesis addressed embedded early vision techniques for efficient background modeling and midground detection. His research interests include embedded vision algorithms. He is a member of the IEEE and the Computer Society.