Boolean
Algebra
Module
3
Boolean Algebra
- Algebras,
binary logic, Boolean expressions, and truth tables
- Evaluation
of Boolean expressions
- Basic
gate symbols: AND, OR, NAND, NOR, INVERT, XOR, XNOR
- Logical
multiplication (AND), logical addition (OR) and unary operator
(complement)
Boolean Functions with Two Input Variables
- Four
input combinations {00,01,10,11}
- Sixteen
possible functions
Input |
F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 |
00 01 10 11 |
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 |
- Which
of the preceding correspond to known Boolean functions?
- Functions
of more than two input variables?
- Precedence rules and
the evaluation of Boolean functions
- Parentheses à NOT à AND à OR
- Examples
Combinational Networks
- Gate symbols and DeMorgan's
equivalents, and DeMorgan’s square
·
OR equivalent
found by using DeMorgan's Theorem: x + y = (x'y')' = (x')'+(y')' = x + y
·
Alternatively AND
equivalent found by using DeMorgan's Theorem: xy = (x' + y')' = (x')'(y')' = xy
- Description
and properties of combinational networks
·
Side-effect free
·
Propagation
delays
·
Design approach:
Boolean expressions, algebraic simplification, gate level design
Circuit Analysis
- Given
a circuit generate the truth table (switching function) and boolean
expression (switching expression)
- Examples
Circuit Synthesis
- Given
a switching (boolean) expression construct the gate network
- Examples
Principal identities in Boolean Algebra
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0 + a = a
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1a = a
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Identity
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1 + a = 1
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0a = 0
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a + a = a
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aa = a
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Idempotency
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a + a' = 1
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aa' = 0
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Complement
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(a')' = a
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Involution
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a + (b + c) = (a + b) + c
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ab + a’c + bc
= ab + a’c
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(a+b)(a’+c)(b+c)
= (a+b)(a’+c)
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Consensus Theorem
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Equivalent expressions and algebraic simplification
- A Boolean expression remains valid if we take
the dual of expressions on the LHS and RHS
- Replace 0s by 1s and
ANDs by ORs and vice versa
- Principal identities
can be used to simplify boolean expressions
- Examples
Universal Gate Sets
- What gate types do we need to realize arbitrary boolean functions?
- AND, OR, NOT : more natural
- We really need only AND and NOT or OR and NOT
- NAND or NOR : single gate type
Standard
Forms
- Minterms
and maxterms: definitions in truth table
- Sum
of minterms
- For example,
F(A,B,C) = m1 + m3 + m6 = ∑
m(1,3,6) = one-set(1,3,6)
- canonical sum of products (SOP)
- implementing a function as sum of minterms
- construction of sum of minterms from boolean
expressions: algebraic vs. truth table
- example
- Product
of maxterms
- unique,
decimal-notations
- For
example, F(A,B,C) = M1 + M3 + M6 = ∏
M(1,3,6) = zero-set(1,3,6)
- canonical product of
sums (POS)
- implementing a function as product of maxterms
- construction of product of maxterms from boolean
expressions: algebraic vs. truth table
- example
- Converting
between Minterm form and Maxterm form
Sum of Products and Product of Sums
- Sum of minterms corresponds to SOP: example
- Different levels
- 1-level à both POS and SOP
- ex: A+B+C =
(A·1)+(B·1)+(C·1) = (A+B+C)·(1)
- ex: A·B·C =
(A+0)·(B+0)·(C+0) = (A·B·C)+0
- 2-level à either POS or SOP
- ex: (A+B)·(B+C) à POS
- ex: (A·B)+(B·C) à SOP
- SOP can always be rewritten as POS and vice
versa
- 3-level à neither POS or SOP
- ex: (A+B)·(C+B·D)
- ex: A·C+A·B+A·(C+B)
- can always be rewritten into 2nd level form by
Boolean reduction
- Implementation in all NAND or NOR gates
Examples
Example - How Minterms are
Represented by Input Variables
Example - How Maxterms are
Represented by Input Variables
Example - Sum of Minterms
Example
Thus,
the final function, F, may be written as the OR (or sum) of these minterm
functions. i.e. F=*=(A'·B'·C)+(A'·B·C')+(A·B·C')
Example - Product of
Maxterms Example
Thus,
the final function, F, may be written as the AND (or product) of these maxterm
functions. i.e. F=*=(A+B+C)(A+B'+C')(A'+B+C')
Example - How Sum of
Minterms Corresponds to SOP
Given
the following truth table:
The sum
of minterms is:

This
reduces by Boolean algebra as follows:
distributive
property using by multiplying the third term by A + A’ = 1
complement law, B + B’ = 1

F
and Freduced are equivalent functions. While F is the sum of
minterms, both F and Freduced are sum of products.
Example:
Implement
the following POS function using only NOR gates. Assume you have all signal and
signal complements.
Solution:
First
implement function using AND and OR gates, noting where the inputs are
inverted.

Now
replace all gates with NOR gates or DeMorgan equivalent NOR gates. Notice, by
choosing NOR gates for implementing POS, inverters are required at the input
only.

Example:
Implement the following SOP
function using only NAND gates. Assume you have all signal and signal
complements.

Solution:
First
implement function using AND and OR gates, noting where the inputs are
inverted.

Now
replace all gates with NAND gates or DeMorgan equivalent NAND gates. Notice, by
choosing NAND gates for implementing SOP, inverters are required at the input
only.
Question, comments or problems with this page to Sudhakar Yalamanchili