Boolean Algebra

Module 3

Reading Assignment (4th edition):

  • Sections 2.1- 2.4 (pp. 35-56),
  • Sections 2.8-2.10 (pp. 81-90)

Schedule of Lectures

Sample Problems

Problems, 1, 2(A,D,F), 4

Previous Lecture

Next Lecture

Supplemental Material

 

Boolean Algebra

Boolean Functions with Two Input Variables

Input
F0  F1  F2  F3  F4  F5  F6  F7  F8  F9  F10 F11 F12 F13 F14 F15
00
01
10
11
0   0   0   0   0   0   0   0   1   1   1   1   1   1   1   1
0   0   0   0   1   1   1   1   0   0   0   0   1   1   1   1
0   0   1   1   0   0   1   1   0   0   1   1   0   0   1   1
0   1   0   1   0   1   0   1   0   1   0   1   0   1   0   1

Combinational Networks

·         OR equivalent found by using DeMorgan's Theorem: x + y = (x'y')' = (x')'+(y')' = x + y

·         Alternatively AND equivalent found by using DeMorgan's Theorem: xy = (x' + y')' = (x')'(y')' = xy

·        Side-effect free

·        Propagation delays

·        Design approach: Boolean expressions, algebraic simplification, gate level design

Circuit Analysis

Circuit Synthesis

Principal identities in Boolean Algebra

 

 

 

Laws

0 + a = a

1a = a

Identity

1 + a = 1

0a = 0

 

a + a = a

aa = a

Idempotency

a + a' = 1

aa' = 0

Complement

(a')' = a

 

Involution

a + b = b + a

ab = ba

Commutativity

a +(bc) = (a + b)(a + c)

a(b + c) = ab + ac

Distributivity

a + (b + c) = (a + b) + c

a(bc) = (ab)c

Associativity

a + ab = a

a(a + b) = a

Absorption

a + a'b = a + b

a(a' + b) = ab

Simplification

( a + b)' = a' b'

(ab)' = a' + b'

DeMorgan's Law

ab + a’c + bc = ab + a’c

(a+b)(a’+c)(b+c) = (a+b)(a’+c)

Consensus Theorem

Equivalent expressions and algebraic simplification

Universal Gate Sets

Standard Forms

Sum of Products and Product of Sums

 


Examples

Example - How Minterms are Represented by Input Variables

A B C

A' B C'

A'·B·C'

0 0 0

1 0 1

0

0 0 1

1 0 0

0

0 1 0

1 1 1

1

0 1 1

1 1 0

0

1 0 0

0 0 1

0

1 0 1

0 0 0

0

1 1 0

0 1 1

0

1 1 1

0 1 0

0

Example - How Maxterms are Represented by Input Variables

A B C

A' B C'

A'+B+C'

0 0 0

1 0 1

1

0 0 1

1 0 0

1

0 1 0

1 1 1

1

0 1 1

1 1 0

1

1 0 0

0 0 1

1

1 0 1

0 0 0

0

1 1 0

0 1 1

1

1 1 1

0 1 0

1

Example - Sum of Minterms Example

A B C

F

A'·B'·C      A'·B·C'      A·B·C'

*

0 0 0

0

0 0 0

0

0 0 1

1

1 0 0

1

0 1 0

1

0 1 0

1

0 1 1

0

0 0 0

0

1 0 0

0

0 0 0

0

1 0 1

0

0 0 0

0

1 1 0

1

0 0 1

1

1 1 1

0

0 0 0

0

Thus, the final function, F, may be written as the OR (or sum) of these minterm functions. i.e. F=*=(A'·B'·C)+(A'·B·C')+(A·B·C')

Example - Product of Maxterms Example

A B C

F

A+B+C      A+B'+C'      A'+B+C'

*

0 0 0

0

0 1 1

0

0 0 1

1

1 1 1

1

0 1 0

1

1 1 1

1

0 1 1

0

1 0 1

0

1 0 0

1

1 1 1

1

1 0 1

0

1 1 0

0

1 1 0

1

1 1 1

1

1 1 1

1

1 1 1

1

Thus, the final function, F, may be written as the AND (or product) of these maxterm functions. i.e. F=*=(A+B+C)(A+B'+C')(A'+B+C')

Example - How Sum of Minterms Corresponds to SOP

Given the following truth table:

A B C

F

0 0 0

0

0 0 1

1

0 1 0

0

0 1 1

1

1 0 0

0

1 0 1

1

1 1 0

0

1 1 1

0

The sum of minterms is:


boolean-01

This reduces by Boolean algebra as follows:


boolean-02 


boolean-04  distributive property using by multiplying the third term by A + A’ = 1


boolean-05  complement law, B + B’ = 1


boolean-07

F and Freduced are equivalent functions. While F is the sum of minterms, both F and Freduced are sum of products.

Example:

Implement the following POS function using only NOR gates. Assume you have all signal and signal complements.

boolean-08

Solution:

First implement function using AND and OR gates, noting where the inputs are inverted.

boolean-09

Now replace all gates with NOR gates or DeMorgan equivalent NOR gates. Notice, by choosing NOR gates for implementing POS, inverters are required at the input only.

boolean-10

Example:

Implement the following SOP function using only NAND gates. Assume you have all signal and signal complements.

boolean-11

Solution:

First implement function using AND and OR gates, noting where the inputs are inverted.

boolean-12

Now replace all gates with NAND gates or DeMorgan equivalent NAND gates. Notice, by choosing NAND gates for implementing SOP, inverters are required at the input only.

boolean-13

 

 

Question, comments or problems with this page to Sudhakar Yalamanchili