No Title



VLSI DIGITAL SIGNAL PROCESSORS:

An Introduction to Rapid Prototyping and Design Synthesis.

by

Vijay K. Madisetti

Georgia Institute of Technology

(ISBN 7506-9406-8)

Butterworth Heinemann/IEEE Press 1995

abstract



abstract

VLSI Digital Signal Processors: An Introduction to Rapid Prototyping and Design Synthesis provides a cohesive, quantitative and clear exposition of the implementation and prototyping of digital signal processing algorithms on programmable signal processors, parallel processing systems, and application-specific ICs. Included in this book are both programmable and dedicated DSPs as well as discussions on the latest optimization methods, and computer-aided design (CAD) techniques, using a systems-based approach.

This book is suitable for first/second year graduate students in signal processing, computer engineering, telecommunications or control engineering, and may also be used at the senior undergraduate level. It will also be useful for the practicing professional in the industry.

The book has been class-tested for 4 years at Georgia Tech, and has been offered on NTU. Basic digital design and an introduction to digital signals and systems is a sufficient background for this book, and no knowledge of VLSI design is assumed.

Exercises for five chapters and an extensive list of recent references are provided. (Approximately 5000 copies sold since June 1995).

 CONTENTS

        Chapter 1:  Digital Signal Processors
        Chapter 2:  Classification of DSP Architectures
        Chapter 3:  Data/Instruction Memories,
                    Communications, I/O
        Chapter 4:  VLSI Signal Processors:
        Chapter 5:  Datapath Design for DSP,
                    High-Level Synthesis
        Chapter 6:  Rapid Prototyping of Systems
        Chapter 7:  Digital Signal Multiprocessors (DSMP)
        Chapter 8:  DSMP Compilers and Schedulers
        Chapter 9:  Formal Optimization methods for 
                    Scheduling, Assignment and Allocation
                    for DSPs, Constrained Behavioral Synthesis.
        Chapter 10: Examples of DSMP Prototyping 
        Chapter 11: Video Signal Processors (VSPs).
 

              524 pp.,  Hardcover,  ISBN 7506-9406-8
                   May 1995.    $ 69.95.

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------------------------------------------------------------------
Quick-Turnaround ASIC Design in VHDL
Core-Based Behavioral Synthesis

---------------------------------------------------------------------
by

Mohamed S. Ben Romdhane
Rockwell International Science Center, Thousand Oaks, CA, USA
Vijay K. Madisetti
Georgia Institute of Technology, Atlanta, USA
John W. Hines
USAF Wright Laboratories, OH, USA
THE KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE VOLUME 367

From the Foreword..... Modern digital signal processing applications provide a large challenge to the system designer. Algorithms are becoming increasingly complex, and yet they must be realized with tight performance constraints. Nevertheless, these DSP algorithms are often built from many constituent canonical subtasks (e.g., IIR and FIR filters, FFTs) that can be reused in other subtasks. Design is then a problem of composing these core entities into a cohesive whole to provide both the intended functionality and the required performance.

In order to organize the design process, there have been two major approaches. The top-down approach starts with an abstract, concise, functional description which can be quickly generated. On the other hand, the bottom-up approach starts from a detailed low-level design where performance can be directly assessed, but where the requisite design and interface detail take a long time to generate. In this book, the authors show a way to effectively resolve this tension by retaining the high-level conciseness of VHDL while parameterizing it to get good fit to specific applications through reuse of core library components. Since they build on a pre-designed set of core elements, accurate area, speed and power estimates can be percolated to high- level design routines which explore the design space. Results are impressive, and the cost model provided will prove to be very useful. Overall, the authors have provided an up-to-date approach, doing a good job at getting performance out of high-level design. The methodology provided makes good use of extant design tools, and is realistic in terms of the industrial design process. The approach is interesting in its own right, but is also of direct utility, and it will give the existing DSP CAD tools a highly competitive alternative. The techniques described have been developed within ARPAs RASSP (Rapid Prototyping of Application Specific Signal Processors) project, and should be of great interest there, as well as to many industrial designers.
Professor Jonathan Allen Massachusetts Institute of Technology

Contents:
Preface. 1. Introduction. 2. Background. 3. VHDL-Based Design. 4. Design for Reuse. 5. Design with Reuse. 6. Board Integration. 7. Conclusions. A. DWR Software. References. Index.

Kluwer Academic Publishers, Boston

Date of publishing: May 1996 216 pp. Hardbound

ISBN: 0-7923-9744-4 Prices:

NLG: 175.00 USD: 95.00 GBP: 67.50

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Title: Quick-Turnaround ASIC Design in VHDL
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