ECE 3056A: Architecture, Concurrency, and Energy

  Spring 2013



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Course Objective

This course introduces the basic organizational principles of the major components of a processor - the core, memory hierarchy, and the I/O subsystem.  Students gain an understanding of the sources of the performance and energy dissipation in modern processors and learn the multiple forms and levels of parallelism that have been employed to sustain performance in the industry. Assignments using architecture level simulators enable the students to explore the operation and tradeoffs in performance and energy and reinforce the concepts learned in the class room.

Prerequisite:   ECE2035, ECE2031


Text book: Patterson and Hennessey, Computer Organization & Design: The Hardware/Software Interface (4th edition, revised printing).

Course Syllabus:  syllabus 

Course Grading
   
The course grade will be assigned in the following manner:

Office Hours: Please respect the office hours of the instructor by planning ahead. Other times are possible by appointments.
Student honor code: Zero tolerance toward a violation of the student honor code. Any misbehavior will be reported to Dean of Students directly.